The DOI matches its Crossref record; 16 of the 16 references it cites were found in a registry or an index.
Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor
Open accessAbstract
This paper presents a neural recording amplifier array suitable for large-scale integration with multielectrode arrays in very low-power microelectronic cortical implants. The proposed amplifier is one of the most energy-efficient structures reported to date, which theoretically achieves an effective noise efficiency factor (NEF) smaller than the limit that can be achieved by any existing amplifier topology, which utilizes a differential pair input stage. The proposed architecture, which is referred to as a partial operational transconductance amplifier sharing architecture, results in a significant reduction of power dissipation as well as silicon area, in addition to the very low NEF. The effect of mismatch on crosstalk between channels and the tradeoff between noise and crosstalk are theoretically analyzed. Moreover, a mathematical model of the nonlinearity of the amplifier is derived, and its accuracy is confirmed by simulations and measurements. For an array of four neural amplifiers, measurement results show a midband gain of 39.4 dB and a -3-dB bandwidth ranging from 10 Hz to 7.2 kHz. The input-referred noise integrated from 10 Hz to 100 kHz is measured at 3.5 μVrms and the power consumption is 7.92 μW from a 1.8-V supply, which corresponds to NEF = 3.35. The worst-case crosstalk and common-mode rejection ratio within the desired bandwidth are - 43.5 dB and 70.1 dB, respectively, and the active silicon area of each amplifier is 256 μm × 256 μm in 0.18-μm complementary metal-oxide semiconductor technology.
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“A recent work by Majidzadeh et al. [78] demonstrated how to share the reference branch of one front-end amplifier among multiple channels.”
From Implantable neurotechnologies: a review of integrated circuit neural amplifiers (2016) · cites this paper as [78]
In the citing paper
“Recent studies have attempted to reduce the silicon area by using smaller unit capacitors or reducing the amplifier gain [77, 78].”
From Implantable neurotechnologies: a review of integrated circuit neural amplifiers (2016) · cites this paper as [78]
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Metadata
- Authors
- Majidzadeh, V., Schmid, A., & Leblebici, Y.
- Affiliations
- École Polytechnique Fédérale de Lausanne (CH)
- ORCID
- Schmid, Alexandre
- Venue
- IEEE Transactions on Biomedical Circuits and Systems
- Published
- 2011-06
- Volume
- 5
- Issue
- 3
- Pages
- 262-271
- ISSN
- 1932-4545 (ISSN-L)
- 1940-9990
- OpenAlex
- W2164282321
- Cited by
- 165
- References
- 16
- Citations by year
- 2026: 1 · 2025: 3 · 2024: 7 · 2023: 4 · 2022: 9 · 2021: 8 · 2020: 8 · 2019: 15 · 2018: 13 · 2017: 13 · 2016: 15 · 2015: 21 · 2014: 19 · 2013: 13 · 2012: 12
- FWCI
- 9.09
- Type
- journal article
- Language
- en
- Open access
- green
- infoscience.epfl.ch
- Locations
- IEEE Transactions on Biomedical Circuits and Systems (publishedVersion)
- PubMed (publishedVersion)
- Infoscience (Ecole Polytechnique Fédérale de Lausanne) (submittedVersion)
- Infoscience (Ecole Polytechnique Fédérale de Lausanne) (submittedVersion, cc-by-nc-nd)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Analog and Mixed-Signal Circuit Design
- Life Sciences › Neuroscience › Cellular and Molecular Neuroscience › Neuroscience and Neural Engineering
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
- Keywords
- noise efficiency factor, low-power amplifier, microelectrode arrays, cortical implants, crosstalk, common-mode rejection ratio, amplifier nonlinearity, input-referred noise, energy efficiency
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