An Energy-Efficient Micropower Neural Recording Amplifier
Abstract
This paper describes an ultralow-power neural recording amplifier. The amplifier appears to be the lowest power and most energy-efficient neural recording amplifier reported to date. We describe low-noise design techniques that help the neural amplifier achieve input-referred noise that is near the theoretical limit of any amplifier using a differential pair as an input stage. Since neural amplifiers must include differential input pairs in practice to allow robust rejection of common-mode and power supply noise, our design appears to be near the optimum allowed by theory. The bandwidth of the amplifier can be adjusted for recording either neural spikes or local field potentials (LFPs). When configured for recording neural spikes, the amplifier yielded a midband gain of 40.8 dB and a -3-dB bandwidth from 45 Hz to 5.32 kHz; the amplifier's input-referred noise was measured to be 3.06 muVrms while consuming 7.56 muW of power from a 2.8-V supply corresponding to a noise efficiency factor (NEF) of 2.67 with the theoretical limit being 2.02. When configured for recording LFPs, the amplifier achieved a midband gain of 40.9 dB and a -3-dB bandwidth from 392 mHz to 295 Hz; the input-referred noise was 1.66 muVrms while consuming 2.08 muW from a 2.8-V supply corresponding to an NEF of 3.21. The amplifier was fabricated in AMI's 0.5-mum CMOS process and occupies 0.16 mm(2) of chip area. We obtained successful recordings of action potentials from the robust nucleus of the arcopallium (RA) of an anesthesized zebra finch brain with the amplifier. Our experimental measurements of the amplifier's performance including its noise were in good accord with theory and circuit simulations.
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Recent works reported that careful design of the OTA A1 makes low current consumption and low input-referred noise easily achievable.
“Recent works have also reported that by carefully designing the OTA A1, low current consumption and low input-referred noise are easily achievable [63, 141, 142, 156].”
From Implantable neurotechnologies: a review of integrated circuit neural amplifiers (2016) · cites this paper as [142]
The folded cascode OTA is the natural choice for front-end amplifiers operating below 3 V and requiring low NEF and PEF values.
“Instead, the folded cascode OTA (Fig. 5d) is the natural choice for front-end amplifiers operating at supply voltages below 3 V and requiring low NEF and PEF values [103, 141, 142].”
From Implantable neurotechnologies: a review of integrated circuit neural amplifiers (2016) · cites this paper as [142]
Wattanapanitch et al. proposed an NEF optimization scheme for low-voltage neural amplifiers using the folded cascode OTA, which was adopted in later studies.
“Wattanapanitch et al. [142] further proposed an NEF optimization scheme for low-voltage neural amplifiers implemented using the folded cascode OTA, which were adopted in later studies [103, 141].”
From Implantable neurotechnologies: a review of integrated circuit neural amplifiers (2016) · cites this paper as [142]
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- Authors
- Wattanapanitch, W., Fee, M., & Sarpeshkar, R.
- Affiliations
- Massachusetts Institute of Technology (US)
- Venue
- IEEE Transactions on Biomedical Circuits and Systems
- Published
- 2007-06
- Volume
- 1
- Issue
- 2
- Pages
- 136-147
- ISSN
- 1932-4545 (ISSN-L)
- 1940-9990
- OpenAlex
- W2152963787
- Cited by
- 441
- References
- 16
- Citations by year
- 2026: 10 · 2025: 14 · 2024: 13 · 2023: 15 · 2022: 15 · 2021: 25 · 2020: 26 · 2019: 18 · 2018: 28 · 2017: 29 · 2016: 25 · 2015: 36 · 2014: 29 · 2013: 29 · 2012: 35
- FWCI
- 12.92
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- IEEE Transactions on Biomedical Circuits and Systems (publishedVersion)
- PubMed (publishedVersion)
- Topics
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
- Keywords
- energy efficiency, input-referred noise, noise efficiency factor, CMOS integrated circuit, neural spikes, local field potentials, action potential, zebra finch, bandwidth adjustment
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