The DOI matches its Crossref record; 7 of the 7 references it cites were found in a registry or an index.
TEAM: ThrEshold Adaptive Memristor Model
Abstract
Memristive devices are novel devices, which can be used in applications ranging from memory and logic to neuromorphic systems. A memristive device offers several advantages: nonvolatility, good scalability, effectively no leakage current, and compatibility with CMOS technology, both electrically and in terms of manufacturing. Several models for memristive devices have been developed and are discussed in this paper. Digital applications such as memory and logic require a model that is highly nonlinear, simple for calculations, and sufficiently accurate. In this paper, a new memristive device model is presented-TEAM, ThrEshold Adaptive Memristor model. This model is flexible and can be fit to any practical memristive device. Previously published models are compared in this paper to the proposed TEAM model. It is shown that the proposed model is reasonably accurate and computationally efficient, and is more appropriate for circuit simulation than previously published models.
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Cites
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Memristor—The Missing Circuit Element
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Cited by
Kvatinsky, S., Belousov, D., Liman, S., Satat, G., Wald, N., Friedman, E. G., Kolodny, A., & Weiser, U. C. (2014) · IEEE Transactions on Circuits and Systems II: Express Briefs · doi:10.1109/tcsii.2014.2357292 · Cited by 835
Self-citationPattern classification by memristive crossbar circuits using ex situ and in situ training
Alibart, F., Zamanidoost, E., & Strukov, D. B. (2013) · Nature Communications · doi:10.1038/ncomms3072 · Cited by 642
Neuromemristive Circuits for Edge Computing: A Review
Krestinskaya, O., James, A. P., & Chua, L. O. (2020) · IEEE Transactions on Neural Networks and Learning Systems · doi:10.1109/tnnls.2019.2899262 · Cited by 319
Memristor-Based Multilayer Neural Networks With Online Gradient Descent Training
Soudry, D., Di Castro, D., Gal, A., Kolodny, A., & Kvatinsky, S. (2015) · IEEE Transactions on Neural Networks and Learning Systems · doi:10.1109/tnnls.2014.2383395 · Cited by 271
Self-citationResistive memory device requirements for a neural algorithm accelerator
Agarwal, S., Plimpton, S. J., Hughart, D. R., Hsia, A. H., Richter, I., Cox, J. A., James, C. D., & Marinella, M. J. (2016) · 2016 International Joint Conference on Neural Networks (IJCNN) · doi:10.1109/ijcnn.2016.7727298 · Cited by 213
Metadata
- Authors
- Kvatinsky, S., Friedman, E. G., Kolodny, A., & Weiser, U. C.
- Venue
- IEEE Transactions on Circuits and Systems I: Regular Papers
- Published
- 2013-01
- Volume
- 60
- Issue
- 1
- Pages
- 211-221
- ISSN
- 1549-8328 (ISSN-L)
- 1558-0806
- OpenAlex
- W2008901850
- Cited by
- 843
- References
- 7
- FWCI
- 35.20
- Type
- journal article
- Language
- en
- Open access
- closed
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