The DOI matches its Crossref record; 11 of the 11 references it cites were found in a registry or an index.
The Tunnel Source (PNPN) n-MOSFET: A Novel High Performance Transistor
Abstract
As MOSFET is scaled below 90 nm, many daunting challenges arise. Short-channel effects (SCEs; drain-induced barrier lowering and VTHmiddotrolloff), off-state leakage, parasitic capacitance, and resistance severely limit the performance of these transistors. New device innovations are essential to overcome these difficulties. In this paper, we propose the concept of a novel tunnel source (PNPN) n-MOSFET based on the principle of band-to- band tunneling. It is found that the PNPN n-MOSFET has the potential of steep subthreshold swing and improved Ion in addition to immunities against SCEs. Therefore, such a PNPN n-MOSFET can overcome the ever-degrading on-off characteristics of the deeply scaled conventional MOSFET. The design of the PNPN n-MOSFET was extensively examined using simulations. Devices with source-side tunneling junctions were fabricated on bulk substrates using spike anneal, and the experimental data is presented.
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Cites
Physics of Semiconductor Devices
Sze, S. M., & Ng, K. K. (2006) · doi:10.1002/0470068329 · Cited by 14,627
Physics of Semiconductor Devices
(2002) · Kluwer Academic Publishers eBooks · doi:10.1007/b117561 · Cited by 13,963
FinFET-a self-aligned double-gate MOSFET scalable to 20 nm
Hu, C., Bokor, J., King, T.-J., Anderson, E., Kuo, C., Asano, K., Takeuchi, H., Kedzierski, J., Lee, W.-C., & Hisamoto, D. (2000) · IEEE Transactions on Electron Devices · doi:10.1109/16.887014 · Cited by 1,660
Zener tunneling in semiconductors
Kane, E. O. (1960) · Journal of Physics and Chemistry of Solids · doi:10.1016/0022-3697(60)90035-4 · Cited by 955
A new recombination model for device simulation including tunneling
Hurkx, G. A. M., Klaassen, D. B. M., & Knuvers, M. P. G. (1992) · IEEE Transactions on Electron Devices · doi:10.1109/16.121690 · Cited by 938
Low-subthreshold-swing tunnel transistors
Zhang, Q., Zhao, W., & Seabaugh, A. (2006) · IEEE Electron Device Letters · doi:10.1109/led.2006.871855 · Cited by 649
Silicon surface tunnel transistor
Reddick, W. M., & Amaratunga, G. A. J. (1995) · Applied Physics Letters · doi:10.1063/1.114547 · Cited by 368
Impact Ionization MOS (I-MOS)—Part I: Device and Circuit Simulations
Gopalakrishnan, K., Griffin, P. B., & Plummer, J. D. (2005) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2004.841344 · Cited by 311
Vertical Tunnel Field-Effect Transistor
Bhuwalka, K. K., Sedlmaier, S., Ludsteck, A. K., Tolksdorf, C., Schulze, J., & Eisele, I. (2004) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2003.821575 · Cited by 273
Esaki, L. (1974) · Science · doi:10.1126/science.183.4130.1149 · Cited by 102
Cited by
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Seabaugh, A. C., & Zhang, Q. (2010) · Proceedings of the IEEE · doi:10.1109/jproc.2010.2070470 · Cited by 1,635
Narang, R., Reddy, K. V. S., Saxena, M., Gupta, R. S., & Gupta, M. (2012) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2012.2208115 · Cited by 308
Comparative analysis of dielectric- modulated FET and TFET-based biosensor
Narang, R., Saxena, M., & Gupta, M. (2015) · IEEE Transactions on Nanotechnology · doi:10.1109/tnano.2015.2396899 · Cited by 296
Metadata
- Authors
- Nagavarapu, V., Jhaveri, R., & Woo, J. C. S.
- Venue
- IEEE Transactions on Electron Devices
- Published
- 2008-04
- Volume
- 55
- Issue
- 4
- Pages
- 1013-1019
- ISSN
- 0018-9383 (ISSN-L)
- OpenAlex
- W2168542137
- Cited by
- 355
- References
- 11
- FWCI
- 16.14
- Type
- journal article
- Language
- en
- Open access
- closed
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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.