2.4GHz 7mW all-digital PVT-variation tolerant True Random Number Generator in 45nm CMOS
Abstract
An all-digital True Random Number Generator is fabricated in 45nm CMOS with 2.4Gbps random bit throughput and total power consumption of 7mW. Two-step coarse/fine-grained tuning with a self-calibrating feedback loop enables robust operation in the presence of 20% process variation while providing immunity to run-time voltage and temperature fluctuations. The 100% digital design enables a compact layout occupying 4004μm2with measured entropy of 0.999965, and scalable operation down to 280mV, while passing all NIST RNG tests.
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All prior true random number generators have suffered from drawbacks in scalability, circuit complexity, or reliance on post-processing such as a Von Neumann corrector to remove bias.
“However, all prior TRNGs have suffered from drawbacks in scalability, circuit complexity, or relied on post-processing such as a “Von Neumann corrector” to remove bias from the generated bit sequences4–13.”
From A novel true random number generator based on a stochastic diffusive memristor (2017) · cites this paper as [12]
Cites
A noise-based IC random number generator for applications in cryptography
Petrie, C. S., & Connelly, J. A. (2000) · IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications · doi:10.1109/81.847868 · Cited by 487 · see citing works
Bucci, M., Germani, L., Luzzi, R., Trifiletti, A., & Varanonuovo, M. (2003) · IEEE Transactions on Computers · doi:10.1109/tc.2003.1190581 · Cited by 403 · see citing works
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A novel true random number generator based on a stochastic diffusive memristor
Jiang, H., Belkin, D., Savel’ev, S. E., Lin, S., Wang, Z., Li, Y., Joshi, S., Midya, R., Li, C., Rao, M., et al. (2017) · Nature Communications · doi:10.1038/s41467-017-00869-x · Cited by 459 · see citing works
True Random Number Generator circuits based on single- and multi-phase beat frequency detection
Tang, Q., Kim, B., Lao, Y., Parhi, K. K., & Kim, C. H. (2014) · Proceedings of the IEEE 2014 Custom Integrated Circuits Conference · doi:10.1109/cicc.2014.6946136 · Cited by 75 · see citing works
- Authors
- Srinivasan, S., Mathew, S., Ramanarayanan, R., Sheikh, F., Anders, M., Kaul, H., Erraguntla, V., Krishnamurthy, R., & Taylor, G.
- Affiliations
- Intel (United States) (US)
- Venue
- 2010 Symposium on VLSI Circuits
- Publisher
- IEEE
- Published
- 2010-06
- Pages
- 203-204
- ISSN
- 2166-9600 (ISSN-L)
- OpenAlex
- W2099686261
- Cited by
- 52
- References
- 2
- Citations by year
- 2023: 4 · 2022: 2 · 2021: 1 · 2020: 6 · 2019: 5 · 2018: 4 · 2017: 6 · 2016: 5 · 2015: 4 · 2014: 5 · 2013: 4 · 2012: 2
- FWCI
- 1.94
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- Symposium on VLSI Circuits (publishedVersion)
- Funders
- National Institute of Standards and Technology
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
- Keywords
- true random number generator, process variation tolerance, temperature and voltage variation, self-calibration, 45 nm CMOS, low power consumption, low-voltage operation, NIST randomness tests, entropy (information theory)
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