Cited by 75Physical Unclonable Functions (PUFs) and Hardware SecurityAdvancements in PLL and VCO TechnologiesLow-power high-performance VLSI design

True Random Number Generator circuits based on single- and multi-phase beat frequency detection

Tang, Qianying, Kim, Bongjin, Lao, Yingjie, Parhi, Keshab K., Kim, Chris H.·2014·Proceedings of the IEEE 2014 Custom Integrated Circuits Conference

Abstract

A fully-digital True Random Number Generator (TRNG) measures the frequency difference between two free-running ring oscillators, or in other words the beat frequency, to extract random frequency jitter. For generating a continuous stream of random bits with a high entropy level, the lower significant bits meeting the NIST randomness criteria are concatenated. The generation efficiency is further improved by utilizing a multi-phase structure. The proposed circuit fabricated in 65nm achieves an energy efficiency of 15.1Mb/mW at 0.8V. Experimental data collected from eight TRNG test chips passed all 15 NIST tests without the use of any feedback or tracking scheme.

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Crossref · 10.1109/cicc.2014.6946136

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7 of 7 references verified0 citation errors · 0 not checkable

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Authors
Tang, Q., Kim, B., Lao, Y., Parhi, K. K., & Kim, C. H.
Affiliations
University of Minnesota (US)
Venue
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference
Publisher
IEEE
Published
2014-09
Pages
1-4
ISSN
0886-5930 (ISSN-L)
OpenAlex
W2092798673
Cited by
75
References
7
Citations by year
2025: 4 · 2024: 3 · 2023: 9 · 2022: 6 · 2021: 10 · 2020: 9 · 2019: 8 · 2018: 8 · 2017: 9 · 2016: 7 · 2015: 2
FWCI
3.94
Type
conference paper
Language
en
Open access
closed
Locations
Custom Integrated Circuits Conference (publishedVersion)
Topics
  • Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Advancements in PLL and VCO Technologies
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
Keywords
true random number generator, beat frequency detection, ring oscillator, frequency jitter, 65 nm CMOS, energy efficiency, NIST randomness tests, hardware randomness

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