A noise-based IC random number generator for applications in cryptography
Abstract
The design of a mixed-signal random number generator (RNG) integrated circuit (IC) suitable for integration with hardware cryptographic systems is presented. Certain applications in cryptography require the use of a truly RNG, a device which produces unpredictable and unbiased digital signals derived from a fundamental noise mechanism. For IC-based cryptographic systems, an RNG must harness randomness from a low-power noise signal yet remain insensitive to deterministic influences such as crosstalk, power supply noise, and clock signal coupling through the substrate. An RNG IC utilizing established analog IC design techniques was designed and fabricated in a 2-/spl mu/m CMOS technology. Sequences generated by the experimental system repeatedly passed many standard randomness tests for bit rates up to 1.4 MHz. No changes in randomness performance were observed as the system was exposed to power supply noise and substrate signal coupling. The system occupies a total chip area of 1.5 mm/sup 2/ and dissipates 3.9 mW of power.
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Classical noise-based TRNGs use a high-gain differential amplifier to amplify noise and compare it with a threshold in a comparator to produce a digital signal.
“Classical noise-based TRNGs use high-gain differential amplifier to amplify noise to a level and compared with a threshold in a comparator, then the amplified noise is converted to produce a digital signal [2].”
From True Random Number Generators Using Electrical Noise (2019) · cites this paper as [2]
TRNGs using phase jitter extract entropy from edge-jitter of an oscillator and sample jitter events using a phase detector, including ring oscillators, coupled oscillators and Fibonacci/Galois ring oscillators.
“These TRNGs extract entropy from edge-jitter of oscillator and sample jitter events using phasedetector, including ring oscillators [7], coupled oscillators [2], [22], [23] and Fibonacci/Galois ring oscillators [24], [25].”
From True Random Number Generators Using Electrical Noise (2019) · cites this paper as [2]
All prior true random number generators have suffered from drawbacks in scalability, circuit complexity, or reliance on post-processing such as a Von Neumann corrector to remove bias.
“However, all prior TRNGs have suffered from drawbacks in scalability, circuit complexity, or relied on post-processing such as a “Von Neumann corrector” to remove bias from the generated bit sequences4–13.”
From A novel true random number generator based on a stochastic diffusive memristor (2017) · cites this paper as [5]
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- Authors
- Petrie, C. S., & Connelly, J. A.
- Affiliations
- Georgia Institute of Technology (US)
- Venue
- IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications
- Published
- 2000-05
- Volume
- 47
- Issue
- 5
- Pages
- 615-621
- ISSN
- 1057-7122 (ISSN-L)
- OpenAlex
- W2113158626
- Cited by
- 487
- References
- 24
- Citations by year
- 2026: 22 · 2025: 24 · 2024: 23 · 2023: 24 · 2022: 21 · 2021: 30 · 2020: 42 · 2019: 26 · 2018: 21 · 2017: 40 · 2016: 24 · 2015: 20 · 2014: 19 · 2013: 17 · 2012: 20
- FWCI
- 5.94
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications (publishedVersion)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Keywords
- random number generators, hardware random number generation, true randomness, mixed-signal circuits, cryptography, CMOS, power supply noise, crosstalk, substrate coupling, randomness testing, low power design
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