Cauwenberghs, Gert

A compute-in-memory chip based on resistive random-access memory

Wan, W., Kubendran, R., Schaefer, C., Eryilmaz, S. B., Zhang, W., Wu, D., Deiss, S., Raina, P., Qian, H., Gao, B., et al. (2022) · Nature

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 943

Capacitively coupled arrays of multiplexed flexible silicon transistors for long-term cardiac electrophysiology

Fang, H., Yu, K. J., Gloschat, C., Yang, Z., Song, E., Chiang, C.-H., Zhao, J., Won, S. M., Xu, S., Trumpis, M., et al. (2017) · Nature Biomedical Engineering

Neuroscience and Neural EngineeringAdvanced Sensor and Energy Harvesting Materials

Cited by 278

An analog VLSI recurrent neural network learning a continuous-time trajectory

Cauwenberghs, G. (1996) · IEEE Transactions on Neural Networks

Analog and Mixed-Signal Circuit DesignAdvanced Memory and Neural Computing

Cited by 127

Hierarchical Address Event Routing for Reconfigurable Large-Scale Neuromorphic Systems

Park, J., Yu, T., Joshi, S., Maier, C., & Cauwenberghs, G. (2017) · IEEE Transactions on Neural Networks and Learning Systems

Advanced Memory and Neural ComputingInterconnection Networks and Systems

Cited by 118

Sub- $\mu$ Vrms-Noise Sub- $\mu$ W/Channel ADC-Direct Neural Recording With 200-mV/ms Transient Recovery Through Predictive Digital Autoranging

Kim, C., Joshi, S., Courellis, H., Wang, J., Miller, C., & Cauwenberghs, G. (2018) · IEEE Journal of Solid-State Circuits

Analog and Mixed-Signal Circuit DesignRadio Frequency Integrated Circuit Design

Cited by 104

A Voltage-Mode Sensing Scheme with Differential-Row Weight Mapping for Energy-Efficient RRAM-Based In-Memory Computing

Wan, W., Kubendran, R., Gao, B., Joshi, S., Raina, P., Wu, H., Cauwenberghs, G., & Wong, H. S. P. (2020) · 2020 IEEE Symposium on VLSI Technology

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 42

A Fully Integrated RF-Powered Energy-Replenishing Current-Controlled Stimulator

Ha, S., Kim, C., Park, J., Cauwenberghs, G., & Mercier, P. P. (2019) · IEEE Transactions on Biomedical Circuits and Systems

Analog and Mixed-Signal Circuit DesignRadio Frequency Integrated Circuit Design

Cited by 35

Memory-Efficient Synaptic Connectivity for Spike-Timing- Dependent Plasticity

Pedroni, B. U., Joshi, S., Deiss, S. R., Sheik, S., Detorakis, G., Paul, S., Augustine, C., Neftci, E. O., & Cauwenberghs, G. (2019) · Frontiers in Neuroscience

Advanced Memory and Neural ComputingNeural dynamics and brain function

Cited by 29

Hierarchical Multicast Network-On-Chip for Scalable Reconfigurable Neuromorphic Systems

Hota, G., Mysore, N., Deiss, S., Pedroni, B., & Cauwenberghs, G. (2022) · 2022 IEEE International Symposium on Circuits and Systems (ISCAS)

Interconnection Networks and SystemsAdvanced Memory and Neural Computing

Cited by 7

Hierarchical Network Connectivity and Partitioning for Reconfigurable Large-Scale Neuromorphic Systems

Mysore, N., Hota, G., Deiss, S. R., Pedroni, B. U., & Cauwenberghs, G. (2022) · Frontiers in Neuroscience

Advanced Memory and Neural ComputingVLSI and FPGA Design Techniques

Cited by 7

Active Inference in Hebbian Learning Networks

Safa, A., Verbelen, T., Keuninckx, L., Ocket, I., Bourdoux, A., Catthoor, F., Gielen, G., & Cauwenberghs, G. (2023) · arXiv

Reinforcement Learning in RoboticsEmbodied and Extended Cognition

Cited by 2

HiAER-spike software-hardware reconfigurable platform for event-driven neuromorphic computing at scale

Frank, G., Hota, G., Wang, K., Deng, C., Arora, K., Vins, D., Uppal, A., Olajide, O., Yoshimoto, K., Wang, Q., et al. (2026) · npj Unconventional Computing

Advanced Memory and Neural ComputingParallel Computing and Optimization Techniques

Cited by 0