Wong, H.-S. Philip
Stanford University
21 papers on CoChatORCID 0000-0002-0096-1472
Most cited papers
- Verified
Metal–Oxide RRAM
Wong, H.-S. P., Lee, H.-Y., Yu, S., Chen, Y.-S., Wu, Y., Chen, P.-S., Lee, B., Chen, F. T., & Tsai, M.-J. (2012) · Proceedings of the IEEE
Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices
Cited by 2,757
- Verified
In-memory computing with resistive switching devices
Ielmini, D., & Wong, H.-S. P. (2018) · Nature Electronics
Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices
Cited by 2,298
- Verified
Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing
Kuzum, D., Jeyasingh, R. G. D., Lee, B., & Wong, H.-S. P. (2012) · Nano Letters
Advanced Memory and Neural ComputingPhase-change materials and chalcogenides
Cited by 1,267
- Verified
A compute-in-memory chip based on resistive random-access memory
Wan, W., Kubendran, R., Schaefer, C., Eryilmaz, S. B., Zhang, W., Wu, D., Deiss, S., Raina, P., Qian, H., Gao, B., et al. (2022) · Nature
Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices
Cited by 943
- Verified
Face classification using electronic synapses
Yao, P., Wu, H., Gao, B., Eryilmaz, S. B., Huang, X., Zhang, W., Zhang, Q., Deng, N., Shi, L., Wong, H.-S. P., et al. (2017) · Nature Communications
Advanced Memory and Neural ComputingNeural Networks and Reservoir Computing
Cited by 909
- Verified
Three-dimensional integration of nanotechnologies for computing and data storage on a single chip
Shulaker, M. M., Hills, G., Park, R. S., Howe, R. T., Saraswat, K., Wong, H.-S. P., & Mitra, S. (2017) · Nature
Advanced Memory and Neural Computing3D IC and TSV technologies
Cited by 866
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An Electronic Synapse Device Based on Metal Oxide Resistive Switching Memory for Neuromorphic Computation
Yu, S., Wu, Y., Jeyasingh, R., Kuzum, D., & Wong, H.-S. P. (2011) · IEEE Transactions on Electron Devices
Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices
Cited by 805
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Artificial optic-neural synapse for colored and color-mixed pattern recognition
Seo, S., Jo, S.-H., Kim, S., Shim, J., Oh, S., Kim, J.-H., Heo, K., Choi, J.-W., Choi, C., Oh, S., et al. (2018) · Nature Communications
Advanced Memory and Neural Computing2D Materials and Applications
Cited by 731
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On the Switching Parameter Variation of Metal-Oxide RRAM—Part I: Physical Modeling and Simulation Methodology
Guan, X., Yu, S., & Wong, H.-S. P. (2012) · IEEE Transactions on Electron Devices
Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices
Cited by 355
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A neuromorphic visual system using RRAM synaptic devices with Sub-pJ energy and tolerance to variability: Experimental characterization and large-scale modeling
Yu, S., Gao, B., Fang, Z., Yu, H., Kang, J., & Wong, H.-S. P. (2012) · 2012 International Electron Devices Meeting
Advanced Memory and Neural ComputingNeural Networks and Reservoir Computing
Cited by 213
- Verified
Brain-like associative learning using a nanoscale non-volatile phase change synaptic device array
Eryilmaz, S. B., Kuzum, D., Jeyasingh, R., Kim, S., BrightSky, M., Lam, C., & Wong, H.-S. P. (2014) · Frontiers in Neuroscience
Advanced Memory and Neural ComputingPhase-change materials and chalcogenides
Cited by 205
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Ultra-Low-Energy Three-Dimensional Oxide-Based Electronic Synapses for Implementation of Robust High-Accuracy Neuromorphic Computation Systems
Gao, B., Bi, Y., Chen, H.-Y., Liu, R., Huang, P., Chen, B., Liu, L., Liu, X., Yu, S., Wong, H.-S. P., et al. (2014) · ACS Nano
Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices
Cited by 188
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HfOx based vertical resistive random access memory for cost-effective 3D cross-point architecture without cell selector
Chen, H.-Y., Yu, S., Gao, B., Huang, P., Kang, J., & Wong, H.-S. P. (2012) · 2012 International Electron Devices Meeting
Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices
Cited by 144
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Hyperdimensional computing with 3D VRRAM in-memory kernels: Device-architecture co-design for energy-efficient, error-resilient language recognition
Li, H., Wu, T. F., Rahimi, A., Li, K.-S., Rusch, M., Lin, C.-H., Hsu, J.-L., Sabry, M. M., Eryilmaz, S. B., Sohn, J., et al. (2016) · 2016 IEEE International Electron Devices Meeting (IEDM)
Advanced Memory and Neural ComputingLow-power high-performance VLSI design
Cited by 136
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Real-Time Observation of the Electrode-Size-Dependent Evolution Dynamics of the Conducting Filaments in a SiO2 Layer
Yuan, F., Zhang, Z., Liu, C., Zhou, F., Yau, H. M., Lu, W., Qiu, X., Wong, H.-S. P., Dai, J., & Chai, Y. (2017) · ACS Nano
Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices
Cited by 99
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Four-layer 3D vertical RRAM integrated with FinFET as a versatile computing unit for brain-inspired cognitive information processing
Li, H., Li, K.-S., Lin, C.-H., Hsu, J.-L., Chiu, W.-C., Chen, M.-C., Wu, T.-T., Sohn, J., Eryilmaz, S. B., Shieh, J.-M., et al. (2016) · 2016 IEEE Symposium on VLSI Technology
Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices
Cited by 75
- Verified
Effect of Wordline/Bitline Scaling on the Performance, Energy Consumption, and Reliability of Cross-Point Memory Array
Liang, J., Yeh, S., Wong, S. S., & Wong, H.-S. P. (2013) · ACM Journal on Emerging Technologies in Computing Systems
Advanced Memory and Neural ComputingLow-power high-performance VLSI design
Cited by 71
- Verified
Design and optimization methodology for 3D RRAM arrays
Deng, Y., Chen, H.-Y., Gao, B., Yu, S., Wu, S.-C., Zhao, L., Chen, B., Jiang, Z., Liu, X., Hou, T.-H., et al. (2013) · 2013 IEEE International Electron Devices Meeting
Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices
Cited by 55
- Verified
Experimental demonstration of array-level learning with phase change synaptic devices
Eryilmaz, S. B., Kuzum, D., Jeyasingh, R. G. D., Kim, S., BrightSky, M., Lam, C., & Wong, H.-S. P. (2013) · 2013 IEEE International Electron Devices Meeting
Advanced Memory and Neural ComputingPhase-change materials and chalcogenides
Cited by 51
- Verified
A Voltage-Mode Sensing Scheme with Differential-Row Weight Mapping for Energy-Efficient RRAM-Based In-Memory Computing
Wan, W., Kubendran, R., Gao, B., Joshi, S., Raina, P., Wu, H., Cauwenberghs, G., & Wong, H. S. P. (2020) · 2020 IEEE Symposium on VLSI Technology
Advanced Memory and Neural ComputingLow-power high-performance VLSI design
Cited by 42
- Verified
Training a Probabilistic Graphical Model With Resistive Switching Electronic Synapses
Eryilmaz, S. B., Neftci, E., Joshi, S., Kim, S., BrightSky, M., Lung, H.-L., Lam, C., Cauwenberghs, G., & Wong, H.-S. P. (2016) · IEEE Transactions on Electron Devices
Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices
Cited by 34
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