CoChat
Sign Up
Cited by 126Advanced Memory and Neural ComputingPhysical Unclonable Functions (PUFs) and Hardware SecurityChaos-based Image/Signal Encryption

The DOI matches its Crossref record; 41 of the 41 references it cites were found in a registry or an index.

Self-clocking fast and variation tolerant true random number generator based on a stochastic mott memristor

Open access
Kim, Gwangmin, In, Jae Hyun, Kim, Young Seok, Rhee, Hakseung, Park, Woojoon, Song, Hanchan, Park, Juseong, Kim, Kyung Min·2021·Nature Communications
DOI 10.1038/s41467-021-23184-yPMC PMC8131590

Published version of a preprint

Open this paper in CoChat — free accountOpen PDF

Abstract

Abstract The intrinsic stochasticity of the memristor can be used to generate true random numbers, essential for non-decryptable hardware-based security devices. Here we propose a novel and advanced method to generate true random numbers utilizing the stochastic oscillation behavior of a NbOx mott memristor, exhibiting self-clocking, fast and variation tolerant characteristics. The random number generation rate of the device can be at least 40 kbs-1, which is the fastest record compared with previous volatile memristor-based TRNG devices. Also, its dimensionless operating principle provides high tolerance against both ambient temperature variation and device-to-device variation, enabling robust security hardware applicable in harsh environments.

Overview

The claims and statistics of this paper haven’t been checked yet.

Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.

A few free checks a day · papers already verified open instantly · results are public

Integrity signals

Registry

Crossref · 10.1038/s41467-021-23184-y

Cites

41 of 41 references verified0 citation errors · 0 not checkable

Statistics

Figures

Fig. 1 Electrical properties of NbOx-based threshold switching (TS) device, and its stochastic oscillation. a An optical microscope image of the NbOx-based two terminal device. The inset shows the stack of the device. b A representative I–V curve with a current sweep mode showing two negative differential resistance (NDR) behaviors, noted to NDR-1 and NDR-2. The inset shows I–V curves in a voltage sweep mode with compliance currents ranging from 0.1 mA to 1 mA. c An oscillator circuit composed of the device and a series resistor. The TS device composed of a volatile memristor and an internal capacitor. d Experimentally obtained 20 oscillation current outputs (red and gray) under a fixed input voltage pulse (black). The left and right insets magnify the initial and final oscillation outputs, respectively. e A distribution of peak intervals (tintvl) at each oscillation output. It shows 100 distributions collected from 100 testing cycles. Inset shows the average and standard deviation of the tintvl for 100 testing cycles.
Fig. 1 Electrical properties of NbOx-based threshold switching (TS) device, and its stochastic oscillation. a An optical microscope image of the NbOx-based two terminal device. The inset shows the stack of the device. b A representative I–V curve with a current sweep mode showing two negative differential resistance (NDR) behaviors, noted to NDR-1 and NDR-2. The inset shows I–V curves in a voltage sweep mode with compliance currents ranging from 0.1 mA to 1 mA. c An oscillator circuit composed of the device and a series resistor. The TS device composed of a volatile memristor and an internal capacitor. d Experimentally obtained 20 oscillation current outputs (red and gray) under a fixed input voltage pulse (black). The left and right insets magnify the initial and final oscillation outputs, respectively. e A distribution of peak intervals (tintvl) at each oscillation output. It shows 100 distributions collected from 100 testing cycles. Inset shows the average and standard deviation of the tintvl for 100 testing cycles.CC BY · PubMed Central
Fig. 2 Simulations of stochastic oscillation characteristic induced by thermal fluctuation. a A numerically simulated I–V curve (blue) compared with an experimental one (red line). b Simulated 20 oscillation currents (red and gray) under a fixed voltage input (black). The oscillation outputs overlap well at the beginning, but they disperse at the end. c Simulated distributions of the peak intervals for 100 cycles. Inset shows an average and a standard deviation of intervals. The results reproduce the experimental results in Fig. 1e. d A geometry used for a thermodynamic simulation, which is identical to the fabricated device in Fig. 1a. e Simulated I–V curves from the thermodynamic simulation under a sinusoidal input voltage. The insets show heat distribution at each moment. f The maximum temperatures at the moment of switch on (②, blue) and switch off (④, red) for 20 cycles of simulation, showing they fluctuate.
Fig. 2 Simulations of stochastic oscillation characteristic induced by thermal fluctuation. a A numerically simulated I–V curve (blue) compared with an experimental one (red line). b Simulated 20 oscillation currents (red and gray) under a fixed voltage input (black). The oscillation outputs overlap well at the beginning, but they disperse at the end. c Simulated distributions of the peak intervals for 100 cycles. Inset shows an average and a standard deviation of intervals. The results reproduce the experimental results in Fig. 1e. d A geometry used for a thermodynamic simulation, which is identical to the fabricated device in Fig. 1a. e Simulated I–V curves from the thermodynamic simulation under a sinusoidal input voltage. The insets show heat distribution at each moment. f The maximum temperatures at the moment of switch on (②, blue) and switch off (④, red) for 20 cycles of simulation, showing they fluctuate.CC BY · PubMed Central
Fig. 3 A TRNG circuit and its simulation. a The proposed TRNG circuit composed of an input voltage source (Vpulse), a TS oscillator part (red square), a non-inverting amplifier part (blue square), and a negative edge triggered T flip-flop (green square). b The input voltage pulse (black) at node 1 and the output voltage (red) and current (bright blue) at node 2. c The amplified oscillation voltage at node 3 (blue) compared with the output voltage (red) and current (bright blue) at node 2. The horizontal line at 1.25 V indicates the required clock’s peak voltage for T flip-flop operation. d The output current at node 4 (green) with respect to the amplified oscillation voltage as a clock of the T flip-flop. e The input voltage at node 1, the amplified voltage at node 3, and the output current at node 4 during the entire time frame for generating one random bit. In this case, the random output is 1.
Fig. 3 A TRNG circuit and its simulation. a The proposed TRNG circuit composed of an input voltage source (Vpulse), a TS oscillator part (red square), a non-inverting amplifier part (blue square), and a negative edge triggered T flip-flop (green square). b The input voltage pulse (black) at node 1 and the output voltage (red) and current (bright blue) at node 2. c The amplified oscillation voltage at node 3 (blue) compared with the output voltage (red) and current (bright blue) at node 2. The horizontal line at 1.25 V indicates the required clock’s peak voltage for T flip-flop operation. d The output current at node 4 (green) with respect to the amplified oscillation voltage as a clock of the T flip-flop. e The input voltage at node 1, the amplified voltage at node 3, and the output current at node 4 during the entire time frame for generating one random bit. In this case, the random output is 1.CC BY · PubMed Central
Fig. 4 Experimental demonstration of the TRNG. a An operating scheme of the proposed TRNG in experiments. b A photograph of the circuit built on a breadboard (left) and a circuit layout (right). c A demonstration of the random bit generation for six consecutive cycles. A black, red, and green lines show the input pulse voltage, the oscillation current, and the output current of the T flip-flop, respectively. d A P value of the monobit test as a function of the input voltage pulse time. Above the P value of 0.01 (red dashed line), it is regarded as random numbers. After 10 μs of pulse time, the outputs become true random numbers.
Fig. 4 Experimental demonstration of the TRNG. a An operating scheme of the proposed TRNG in experiments. b A photograph of the circuit built on a breadboard (left) and a circuit layout (right). c A demonstration of the random bit generation for six consecutive cycles. A black, red, and green lines show the input pulse voltage, the oscillation current, and the output current of the T flip-flop, respectively. d A P value of the monobit test as a function of the input voltage pulse time. Above the P value of 0.01 (red dashed line), it is regarded as random numbers. After 10 μs of pulse time, the outputs become true random numbers.CC BY · PubMed Central
Fig. 5 Variation tolerant test results at different ambient temperature and at different cells. a The I–V curves at different temperatures from 300 K to 390 K from the same cell. b The oscillation current outputs at different temperatures. The frequency of oscillation increases as the temperature increases at the identical input voltage pulse. c The P value of the monobit test as a function of the input voltage pulse time using 100 bits per each temperature. The random bit reference line of 0.01 is included. The inset shows the minimum pulse time for random number generation as a function of the temperature. d Representatively distinguishable I–V curves from five different cells. e The oscillation current outputs and their frequency from each cell. f The P value for the monobit test obtained from 100 bits collected from each cell. They all pass the test at different random number generation time as shown in the inset.
Fig. 5 Variation tolerant test results at different ambient temperature and at different cells. a The I–V curves at different temperatures from 300 K to 390 K from the same cell. b The oscillation current outputs at different temperatures. The frequency of oscillation increases as the temperature increases at the identical input voltage pulse. c The P value of the monobit test as a function of the input voltage pulse time using 100 bits per each temperature. The random bit reference line of 0.01 is included. The inset shows the minimum pulse time for random number generation as a function of the temperature. d Representatively distinguishable I–V curves from five different cells. e The oscillation current outputs and their frequency from each cell. f The P value for the monobit test obtained from 100 bits collected from each cell. They all pass the test at different random number generation time as shown in the inset.CC BY · PubMed Central

Verification

Claims the paper makes

The claims and statistics of this paper haven’t been checked yet.

Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.

A few free checks a day · papers already verified open instantly · results are public

Claims other papers make about this one

Each is checked against this paper’s own text: does it say what the citing paper says it does?

Self-check

Percentages, sums and reported differences re-computed from the paper’s own numbers.

The self-check needs the paper’s full text.

Citations

Cites

Show all 41 references

Research works printed but not linked: 2

  1. Hashim, N. A. B. N., Teo, J., Hamid, M. S. A. & Hamid, F. A. B. IEEE student conference on research and development (SCOReD). 1–5 (2016)
  2. Wang, Y., Wen, W., Li, H. & Hu, M. Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 271–276 (2015).

Cited by

Sorted by citations

See all 126

Related

Metadata

Authors
Kim, G., In, J. H., Kim, Y. S., Rhee, H., Park, W., Song, H., Park, J., & Kim, K. M.
Affiliations
Korea Advanced Institute of Science and Technology (KR)
Corresponding author
Kim, Kyung Min
ORCID
Venue
Nature Communications
Publisher
Springer Science and Business Media LLC
Published
2021-05-18
Volume
12
Issue
1
Pages
2906-2906
ISSN
2041-1723 (ISSN-L)
DOI
10.1038/s41467-021-23184-y
PMC
PMC8131590
OpenAlex
W3112007195
Cited by
126
References
41
Citations by year
2026: 23 · 2025: 27 · 2024: 32 · 2023: 29 · 2022: 11 · 2021: 3
FWCI
5.51
Type
journal article
Language
en
Open access
Licence
Locations
  • Nature Communications (publishedVersion, cc-by)
  • Research Square (acceptedVersion, cc-by)
  • PubMed Central (publishedVersion, cc-by)
  • PubMed (publishedVersion)
  • RePEc: Research Papers in Economics (submittedVersion)
  • DOAJ (DOAJ: Directory of Open Access Journals) (submittedVersion, cc-by-sa)
Funders
  • Ministry of Trade, Industry and Energy (20003655, 20003789)
  • Korea Advanced Institute of Science and Technology
  • Korea Semiconductor Research Consortium
Topics
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
  • Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
  • Physical Sciences › Computer Science › Computer Vision and Pattern Recognition › Chaos-based Image/Signal Encryption
Keywords
true random number generation, memristors, Mott transition, variation tolerance, temperature variation, device-to-device variation, hardware security, hardware-based cryptography

About these checks

Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.

Statistics and arithmetic are recomputed, not judged.

Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.

What counts as a claim ›How we measure confidence ›How we check this ›

Are you an author, or do you see a problem with this page? Request a review