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Cited by 307Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance DevicesPhase-change materials and chalcogenides

Stochastic memristive devices for computing and neuromorphic applications

Open access
Gaba, Siddharth, Sheridan, Patrick, Zhou, Jiantao, Choi, Shinhyun, Lu, Wei·2013·Nanoscale
DOI 10.1039/c3nr01176c
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Abstract

Nanoscale resistive switching devices (memristive devices or memristors) have been studied for a number of applications ranging from non-volatile memory, logic to neuromorphic systems. However a major challenge is to address the potentially large variations in space and time in these nanoscale devices. Here we show that in metal-filament based memristive devices the switching can be fully stochastic. While individual switching events are random, the distribution and probability of switching can be well predicted and controlled. Rather than trying to force high switching probabilities using excess voltage or time, the inherent stochastic nature of resistive switching allows these binary devices to be used as building blocks for novel error-tolerant computing schemes such as stochastic computing and provides the needed "analog" feature for neuromorphic applications. To verify such potential, we demonstrated memristor-based stochastic bitstreams in both time and space domains, and show that an array of binary memristors can act as a multi-level "analog" device for neuromorphic applications.

AI snapshot

Written from the paper’s full text.

TL;DR

Memristive devices based on Ag filament formation in amorphous silicon show fully stochastic resistive switching, but the switching probability can be predicted and controlled by voltage and pulse width. This enables random bitstreams in time and space and allows a 4-device array to act as a multi-bit synapse for stochastic computing and neuromorphic applications.

Key findings

  • Wait times before switching are broadly distributed and fit a Poisson distribution with one fitting parameter τ. For applied voltages of 2.5 V, 3.5 V, and 4.5 V, τ = 340 ms, 4.7 ms, and 0.38 ms, respectively; a 2 V increase in voltage drops the characteristic time by almost three orders of magnitude.
  • Switching probability is cumulative and predictable: a 2.5 V/300 ms pulse switched the device 20 times out of 50 trials (bias ratio p = 0.4), while a 2.5 V/1000 ms pulse switched it 38 times out of 50 (p = 0.76), closely matching Eq. (2).
  • Random bitstreams were generated in the time domain, and identical pulses applied to different devices produced 20-bit random bitstreams with similar bias ratios. A 4-device array programmed in parallel produced 4-bit-wide random bitstreams and, used as a whole, represents a 2-bit weight synapse; the authors state this is the first experimental demonstration of such a concept.
  • Discrete short pulses are cumulative regardless of gap: with 2.5 V, 100 ms pulses, almost identical τ values were obtained for gaps of 10 ms and 500 ms, and the number of pulses needed to switch followed a Poisson distribution.

Methods

  • Two-terminal crossbar devices were fabricated with a 60 nm boron-doped polysilicon bottom electrode, a 35 nm amorphous silicon insulating layer, and a silver top electrode, using electron beam lithography, PECVD, liftoff, and RIE.
  • Electrical measurements used a National Instruments USB-6259 BNC data acquisition system with a DL 1211 current preamplifier and MATLAB code; parallel testing used analog switches (ADG1412) and an Atmega32u4 microcontroller.
  • Switching statistics were measured by resetting devices to the OFF state, applying constant voltages (2.5, 3.5, 4.5 V) and repeating 100 times per bias, or applying fixed pulses (e.g., 2.5 V/300 ms and 2.5 V/1000 ms for 50 attempts); array experiments used a single 2.75 V, 1000 ms pulse for parallel programming and 2 V, 100 ms pulses for individual readout.

Limitations

  • The paper states this is a proof-of-concept demonstration; large-scale implementation must address spatial variations, power, speed, endurance, and reliability, and logic applications require very high endurance with switching probability that does not degrade over time and is uniform among devices.
  • The paper states that efficient peripheral circuit design to account for endurance limits under low-voltage operation and degradation of switching probability with time remains for future studies.
  • The text makes evident that experiments were limited to single devices and a 4-device array, with small trial counts (50 or 100), and did not demonstrate large-scale arrays or long-term reliability.

Model-written summary. Check it against the paper before relying on it.

Integrity signals

Registry

Crossref · 10.1039/c3nr01176c

Cites

35 of 35 references verified0 citation errors · 0 not checkable

Statistics

Nothing to recompute.

Claims the paper makes

0 of 33 cited sources checked · 0 supported · 0 flagged

  • Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 4

    The Poisson distribution of the wait time, with the standard deviation equaling the mean, verifies that the switching is random and stochastic in nature.

    “The Poisson distribution of the wait time, with the standard deviation equaling the mean, further verifies that the switching is random and stochastic in nature.”
    Quote in the paperSubstantial claim
  • Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 3

    Significant randomness can exist in the switching effects even in the same device.

    “However, careful examination of the switching effects reveals that significant randomness can exist, even in the same device.”
    Quote in the paperSubstantial claim
  • Findingreasoning
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 3

    The wait time before switching shows apparent randomness.

    “The wait time before switching shows apparent randomness.”
    Quote in the paperSubstantial claim
  • Findingreasoning
    § Stochastic Memristive Devices for Computing and Neuromorphic Applications · p. 1

    Individual switching events in these memristive devices are random.

    “While individual switching events are random”
    • Also stated in: § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 3 · plain
      “the individual switching events occur randomly in nature.”
    Quote in the paperSubstantial claim
  • Findingcitation
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 3

    Binary resistive switching can be reliably observed in the fabricated two-terminal crossbar devices with an amorphous silicon layer between a silver top electrode and a polysilicon bottom electrode.

    “Binary resistive switching can be reliably observed in such devices, as shown in the inset to Fig. 1a and as discussed earlier (15).”
    Quote in the paperSubstantial claim0 of 1 sources checked
    • cites [15] 15. Jo, S. H.; Lu, W. CMOS compatible nanoscale nonvolatile resistance switching memory. Nano letters 2008, 8 (2), 392-397. source

      Not checked in the free run.

  • May combine two claims. 25
  • Classified as probably not a substantial claim. 14

  • May combine two claims.

    Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 4

    The switching time distribution at different programming voltages preserves the Poisson nature but the characteristic wait time decreases significantly as the bias voltage is increased.

    “As can be seen from Fig. 1b and Fig. 1c, the switching time distribution at different programming voltages preserves the Poisson nature but the characteristic wait time decreases significantly as the bias voltage is increased.”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 4

    The wait times fit the Poisson distribution with just one fitting parameter (τ), in agreement with the hypothesis of thermodynamic activation over a dominant energy barrier during filament formation.

    “Fig. 1 shows that excellent fit of the wait times to the Poisson distribution in Eq. (1) can be obtained with just one fitting parameter ( τ ), in agreement of the hypothesis of thermodynamic activation over a dominant energy barrier during filament formation in these devices.”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Findingown data
    § Stochastic Memristive Devices for Computing and Neuromorphic Applications · p. 1

    The distribution and probability of switching in these memristive devices can be well predicted and controlled.

    “the distribution and probability of switching can be well predicted and controlled.”
    • Also stated in: § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 11 · plain
      “the probability of switching can be predicted and controlled by the applied voltage and the pulse width used to program the device.”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 3

    The devices exhibit standard switching hysteresis with clearly defined ON and OFF states and an apparent threshold voltage of ca. 5 V.

    “It can be seen from DC sweeps that the devices exhibit standard switching hysteresis with clearly defined ON and OFF states and an apparent threshold voltage of ca. 5 V (Fig. 1a inset).”
    Quote in the paperNot a substantial claim

  • May combine two claims.

    Findingreasoning
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 4

    The characteristic wait time τ is strongly voltage dependent, and the average wait time can be reduced drastically at higher voltages.

    “Since the characteristic wait time τ is strongly voltage dependent, the average wait time can be reduced drastically at higher voltages too.”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 7

    The distribution for the number of pulses needed to switch the device follows a Poisson distribution and can be fitted with just one fitting parameter τ.

    “As expected, the distribution for the number of pulses needed to switch the device also follows a Poisson distribution and can be fitted with just one fitting parameter τ .”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 6

    We can control only the bias ratio of the bit-stream (the overall number of 1s), while the locations of individual 1's are random.

    “It is also important to note here we can control only the bias ratio of the bit-stream (i.e. the overall number of 1s), while the locations of individual 1's are random.”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 10

    If the 4 devices share the same series resistor, only one device is in the ON state after each programming pulse, i.e. the array behaves as a single larger device.

    “Indeed, if the 4 devices share the same series resistor, we indeed observed only one device in the ON state after each programming pulse, i.e. the device array simply behaves as a single, larger device.”
    Quote in the paperSubstantial claim

  • Probably not a substantial claim: may not pass S3 (load-bearing). May combine two claims.

    Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 9

    Each bit in the bitstream was generated at a different time instance; the random bits were produced in serial fashion one after the other, termed 'stochastic bitstream in time'.

    “In Fig. 4 we see that each bit in the bitstream was generated at a different time instance. In other words, the random bits were produced in serial fashion one after the other. This is the commonly termed as 'stochastic bitstream in time'.”
    Quote in the paperNot a substantial claim

  • May combine two claims.

    Findingreasoning
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 10

    If each device has its own local series resistor, the completion of the dominant filament in one device does not cause the decrease of voltage seen by other devices, thus multiple devices can be switched.

    “However, if each device has its own local, series resistor, as shown in Fig. 5a inset, the completion of the dominant filament in one device does not cause the decrease of voltage seen by other devices thus multiple devices can be switched.”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 9

    To modulate the bias ratio or generate another number y, one changes the programming time or the programming voltage.

    “To modulate this bias ratio or, in other words, to generate another number y , all we need to do is to change the programming time or the programming voltage.”
    Quote in the paperSubstantial claim

  • Classified as probably not a substantial claim.

    Findingnone given
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 11

    This study presents a proof-of-concept demonstration in stochastic and neuromorphic computing approaches by taking advantage of the inherent temporal variations in resistive devices.

    “Finally, we would like to point out that this study presents a proof-of-concept demonstration in stochastic and neuromorphic computing approaches by taking advantage of the inherent temporal variations in resistive devices.”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 6

    For a 2.5 V, 300 ms programming pulse, the device switches to the ON state twenty times out of fifty trials, and this number closely matches the prediction from Eq. (2).

    “The device switches to the ON state twenty times out of the fifty trials or attempts. This number closely matches that predicted from the theoretical curve given by Eq. (2).”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Findingown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 10

    Each time the array of 4 devices is programmed, we get a 4-bit wide random bitstream from the array, and exactly which device will switch cannot be predicted at the start of the programming cycle.

    “In other words, each time the array of 4 devices is programmed, we get a 4-bit wide random bitstream from the array, and exactly which device will switch cannot be predicted at the start of the programming cycle.”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Findingcitation
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 10

    The concept of using an array of memristive devices to represent a multi-bit synapse was proposed a few years ago, and to our knowledge this is the first experimental demonstration of such a concept.

    “The concept of using an array of memristive devices to represent a multi-bit synapse was proposed a few years ago (25), and to our knowledge this is the first experimental demonstration of such a concept.”
    Quote in the paperSubstantial claim0 of 1 sources checked
    • cites [25] 25. Likharev, K.; Mayr, A.; Muckra, I.; T. CrossNets: High-Performance Neuromorphic Architectures for CMOL Circuits. Annals of the New York Academy of Sciences 2003, 1006 (1), 146-163.

      Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  • May combine two claims.

    Premisecitation
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 3

    Filament formation involves oxidation, ion transport and reduction processes, all of which are thermodynamically driven and require overcoming specific activation energies.

    “Filament formation involves oxidation, ion transport and reduction processes, all of which are thermodynamically driven (5,18) and require overcoming specific activation energies.”
    Quote in the paperSubstantial claim0 of 2 sources checked
    • cites [5] 5. Valov, I.; Waser, R.; Jameson, J. R.; Kozicki, M. N. Electrochemical metallization memoriesfundamentals, applications, prospects. Nanotechnology 2011, 22 (25), 254003. source

      Not checked in the free run.

    • cites [18] 18. Lu, W.; Jeong, D. S.; Kozicki, M.; Waser, R. Electrochemical metallization cells-blending nanoionics into nanoelectronics? MRS bulletin 2012, 37 (02), 124-130. source

      Not checked in the free run.

  • May combine two claims.

    Interpretationreasoning
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 3

    Even for the same filament in the same device, the wait time will be broadly distributed and in principle can only be predicted in terms of statistics, while individual switching events occur randomly in nature.

    “As a result, even for the same filament in the same device, the wait time will be broadly distributed and in principle can only be predicted in terms of statistics while the individual switching events occur randomly in nature.”
    Quote in the paperSubstantial claim

  • Probably not a substantial claim: may not pass S3 (load-bearing).

    Interpretationcitation
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 3

    The change from OFF to ON state is explained by the formation of a dominating Ag filament.

    “The change from OFF to ON state is explained by the formation of a dominating Ag filament (15,16).”
    Quote in the paperNot a substantial claim0 of 2 sources checked
    • cites [15] 15. Jo, S. H.; Lu, W. CMOS compatible nanoscale nonvolatile resistance switching memory. Nano letters 2008, 8 (2), 392-397. source

      Not checked in the free run.

    • cites [16] 16. Yang, Y.; Gao, P.; Gaba, S.; Chang, T.; Pan, X.; Lu, W. Observation of conducting filament growth in nanoscale resistive memories. Nature Communications 2012, 3, 732. source

      Not checked in the free run.

  • May combine two claims.

    Interpretationcitation
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 4

    By increasing the programming voltage, τ can be reduced significantly down to the nanosecond regime so switching with high success rate can be achieved.

    “Thus by increasing the programming voltage, τ can be reduced significantly down to the nanosecond regime (14) so switching with high success rate can be achieved.”
    Quote in the paperNot a substantial claim0 of 1 sources checked
    • cites [14] 14. Jo, S. H.; Kim, K.-H.; Lu, W. Programmable resistance switching in nanoscale two-terminal devices. Nano letters 2009, 9 (1), 496-500. source

      Not checked in the free run.

  • Probably not a substantial claim: may not pass S3 (load-bearing), S4 (based).

    Interpretationreasoning
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 11

    Since stochastic operations require lower voltages than conventional binary switching, it is expected that even better endurance can be obtained using the proposed approach.

    “Since stochastic operations require lower voltages than conventional binary switching it is expected that even better endurance can be obtained using the proposed approach.”
    Quote in the paperNot a substantial claim

  • Probably not a substantial claim: may not pass S4 (based). May combine two claims.

    Interpretationreasoning
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 9

    For more efficient computing, bitstreams in space domain, i.e. bits generated in parallel or 'stochastic bitstreams in space', are required, which leads to parallel processing of the bitstreams.

    “For more efficient computing, bitstreams in space domain, i.e. bits generated in parallel or 'stochastic bitstreams in space' are also required, which leads to parallel processing of the bitstreams.”
    Quote in the paperNot a substantial claim

  • Probably not a substantial claim: may not pass S3 (load-bearing). May combine two claims.

    Premisecitation
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 8

    SNGs account for the majority of the resource usage in stochastic computing, with a cost as high as 80% of the entire system.

    “SNGs account for the majority of the resource usage in stochastic computing, with a cost as high as 80% of the entire system (24).”
    Quote in the paperNot a substantial claim0 of 1 sources checked
    • cites [24] 24. Alaghi, A.; Hayes, J. P. Survey of Stochastic Computing. ACM Transactions on Embedded Computing Systems (TECS) to appear .

      Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  • Probably not a substantial claim: may not pass S3 (load-bearing). May combine two claims.

    Premisecitation
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 11

    Recent studies have shown that similar devices can be very reliable, robust and switch within nanoseconds.

    “Recent studies have already shown that similar devices can be very reliable, robust and switch within nanoseconds (31,32,33).”
    Quote in the paperNot a substantial claim0 of 3 sources checked
    • cites [31] 31. Lee, M.-J.; Lee, C. B.; Lee D.; Lee, S. R.; Chang M.; Hur J. H., Kim Y.-B.; Kim, C- .J.; Seo, D. H.; Seo, S.; Chung, U.-I.; Yoo I.-K. & Kim K. A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O 5x /TaO 2x bilayer structures. Nature Materials, 2011 , 10, 625-630.

      Not checked in the free run.

    • cites [32] 32. Yang, J.-J.; Zhang, M.-X.; Strachan, J. P.; Miao, F.; Pickett, M.D.; Kelley, R. D.; Mederos-Ribeiro G and Williams, R. S. High switchign endurance in TaOx memristive devices. Appl Phys. Lett. 2010 , 97, 232102 .

      Not checked in the free run.

    • cites [33]

      Not checked in the free run.

  • Classified as probably not a substantial claim.

    Study design and conductnone given
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 6

    After each programming pulse the device was reset to the same original OFF state so each programming pulse starts with the same initial condition.

    “In this experiment, after each programming pulse the device was reset to the same original OFF state so each programming pulse starts with the same initial condition.”
    Quote in the paperSubstantial claim

  • Classified as probably not a substantial claim. May combine two claims.

    Interpretationnone given
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 4

    Using excessively high voltage and excessively long pulses can result in an increased power envelope and lead to unnecessary device degradation.

    “However, using excessively high voltage and excessively long pulses can result in an increased power envelope and lead to unnecessary device degradation.”
    Quote in the paperSubstantial claim

  • Probably not a substantial claim: may not pass S3 (load-bearing). May combine two claims.

    Premisecitation
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 10

    Binary synapses are easier to fabricate, more robust and offer larger dynamic range.

    “Binary synapses are easier to fabricate, more robust and offer larger dynamic range (4,5).”
    Quote in the paperNot a substantial claim0 of 2 sources checked
    • cites [4] 4. Waser, R.; Aono, M. Nanoionics-based resistive switching memories. Nature materials 2007, 6 (11), 833-840. source

      Not checked in the free run.

    • cites [5] 5. Valov, I.; Waser, R.; Jameson, J. R.; Kozicki, M. N. Electrochemical metallization memoriesfundamentals, applications, prospects. Nanotechnology 2011, 22 (25), 254003. source

      Not checked in the free run.

  • Probably not a substantial claim: may not pass S3 (load-bearing). May combine two claims.

    Premisecitation
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 8

    Stochastic computing was first proposed in the 1960s but never became mainstream due to the exponential growth of digital computers.

    “Stochastic computing was first proposed in the 1960s (26,27) but like many concepts proposed ahead of their time it never become mainstream due to the exponential growth of digital computers.”
    Quote in the paperNot a substantial claim0 of 2 sources checked
    • cites [26] 26. Gaines, B. Stochastic computing systems. Advances in Information Systems Science 1969, 2 (2), 37172. source

      Not checked in the free run.

    • cites [27] 27. Poppelbaum, W.; Afuso, C.; Esch, J. Stochastic computing elements and systems. Proceedings of the November 14-16, 1967, fall joint computer conference , 1967; pp 635-644. source

      Not checked in the free run.

  • Classified as probably not a substantial claim.

    Interpretationown data
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 11

    The ability to produce random bitstreams and multi-bit synapses using binary memristive devices based on the native stochastic switching principle may potentially lead to novel non von-Neumann, alternative computing paradigms.

    “Rather than trying to eliminate the non-determinism to use these devices in deterministic memory applications, the ability to produce random bitstreams and multi-bit synapses using binary memristive devices based on the native stochastic switching principle may potentially lead to novel non von-Neumann, alternative computing paradigms.”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Premisecitation
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 10

    It is possible to achieve multi-bit in binary memristive devices by controlling the programming current, however, precise current control in a large network is extremely challenging.

    “It is possible to achieve multi-bit in binary memristive devices by controlling the programming current (5), however, precise current control in a large network is extremely challenging (30).”
    Quote in the paperSubstantial claim0 of 2 sources checked
    • cites [5] 5. Valov, I.; Waser, R.; Jameson, J. R.; Kozicki, M. N. Electrochemical metallization memoriesfundamentals, applications, prospects. Nanotechnology 2011, 22 (25), 254003. source

      Not checked in the free run.

    • cites [30] 30. Kim, K.-H.; Gaba, S.; Wheeler, D.; Cruz-Albrecht, J. M.; Hussain, T.; Srinivasa, N.; Lu, W. A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications. Nano letters 2011, 12 (1), 389-395. source

      Not checked in the free run.

  • Classified as probably not a substantial claim.

    Interpretationreasoning
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 5

    The switching probability can be calculated by integrating the Poisson distribution Eq. (1), leading to Eq. (2).

    “First, we note that the switching probability can be calculated by integrating the Poisson distribution Eq. (1), which leads to”
    Quote in the paperSubstantial claim

  • Classified as probably not a substantial claim.

    Interpretationreasoning
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 8

    The ability to generate random bitstreams using memristive devices can represent an intriguing option for efficient computation of data intensive problems such as image processing using stochastic approaches.

    “The ability to generate random bitstreams using memristive devices can represent an intriguing option for efficient computation of data intensive problems such as image processing using stochastic approaches.”
    Quote in the paperSubstantial claim

  • May combine two claims.

    Interpretationcitation
    § Index Terms -Resistive memory, memristor, bitstreams, stochastic, neuromorphic computing · p. 9

    In these devices, the filament characteristics can be controlled during programming by external circuit parameters such as series-resistance and programming pulse height/width, so similar switching characteristics can be obtained in different devices.

    “In particular, in these devices the filament characteristics can be controlled during programming by external circuit parameters such as series-resistance (29) and programming pulse height/width (14,17) so similar switching characteristics can be obtained in different devices.”
    Quote in the paperSubstantial claim0 of 3 sources checked
    • cites [29] 29. Gaba, S.; Choi, S.; Sheridan, P.; Chang, T.; Yang, Y.; Lu, W. Improvement of RRAM Device Performance Through On-Chip Resistors. MRS Proceedings , 2012. source

      Not checked in the free run.

    • cites [14] 14. Jo, S. H.; Kim, K.-H.; Lu, W. Programmable resistance switching in nanoscale two-terminal devices. Nano letters 2009, 9 (1), 496-500. source

      Not checked in the free run.

    • cites [17] 17. Sheridan, P.; Kim, K.-H.; Gaba, S.; Chang, T.; Chen, L.; Lu, W. Device and SPICE modeling of RRAM devices. Nanoscale 2011, 3 (9), 3833-3840. source

      Not checked in the free run.

32 of 32

  • The authors state this as an assumption.

    For stochastic computing multiplication via a bit-wise AND operation, the input bitstreams x and y are independent and completely uncorrelated.

    “This operation assumes that x and y are independent bitstreams that are completely uncorrelated.”
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Authors
Gaba, S., Sheridan, P., Zhou, J., Choi, S., & Lu, W.
Affiliations
University of Michigan (US)
Corresponding author
Lu, Wei
ORCID
Venue
Nanoscale
Publisher
Royal Society of Chemistry (RSC)
Published
2013
Volume
5
Issue
13
Pages
5872
ISSN
  • 2040-3364 (ISSN-L)
  • 2040-3372
DOI
10.1039/c3nr01176c
OpenAlex
W2148267286
Semantic Scholar
3f0d761f6dabea7d51ed9a69e9cde6865122afd9
Cited by
307
References
35
Citations by year
2026: 14 · 2025: 23 · 2024: 14 · 2023: 22 · 2022: 24 · 2021: 28 · 2020: 32 · 2019: 30 · 2018: 27 · 2017: 29 · 2016: 19 · 2015: 25 · 2014: 16 · 2013: 3
FWCI
12.60
Type
journal article
Language
en
Open access
Locations
  • Nanoscale (publishedVersion)
  • PubMed (publishedVersion)
  • arXiv (Cornell University) (submittedVersion)
  • arXiv (Cornell University)
Topics
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
  • Physical Sciences › Materials Science › Materials Chemistry › Phase-change materials and chalcogenides
Keywords
memristors, resistive switching, stochastic switching, stochastic computing, neuromorphic computing, error-tolerant computing, memristor arrays, non-volatile memory

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Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.

Claims read by deepseek-v4.1-flash under definition version 3 (extract-v3) on 2026-10-09.

Classified by jev-1.13-20260917 (gold-guideline-v0.2) on 2026-10-09.

Statistics and arithmetic are recomputed, not judged.

Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.

What counts as a claim ›How we measure confidence ›How we check this ›

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