Simultaneous emulation of synaptic and intrinsic plasticity using a memristive synapse
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Neuromorphic computing targets the hardware embodiment of neural network, and device implementation of individual neuron and synapse has attracted considerable attention. The emulation of synaptic plasticity has shown promising results after the advent of memristors. However, neuronal intrinsic plasticity, which involves in learning process through interactions with synaptic plasticity, has been rarely demonstrated. Synaptic and intrinsic plasticity occur concomitantly in learning process, suggesting the need of the simultaneous implementation. Here, we report a neurosynaptic device that mimics synaptic and intrinsic plasticity concomitantly in a single cell. Threshold switch and phase change memory are merged in threshold switch-phase change memory device. Neuronal intrinsic plasticity is demonstrated based on bottom threshold switch layer, which resembles the modulation of firing frequency in biological neuron. Synaptic plasticity is also introduced through the nonvolatile switching of top phase change layer. Intrinsic and synaptic plasticity are simultaneously emulated in a single cell to establish the positive feedback between them. A positive feedback learning loop which mimics the retraining process in biological system is implemented in threshold switch-phase change memory array for accelerated training.
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Owing to its self-rectifying characteristics, the device may operate accurately even in a 1k × 1k array without sneak path disturbance.
“Owing to its self-rectifying characteristics, the device may operate accurately even in a 1k × 1k array without sneak path disturbance34,35”
From Flexible self-rectifying synapse array for energy-efficient edge multiplication in electrocardiogram diagnosis (2025) · cites this paper as [35]
The Results section (‘Operation of volatile TS, nonvolatile PCM, and unified TS-PCM’; page unavailable) says the TS layer prevents sneak currents, but reports a calculated maximum array size of 316 × 316 at a 10% readout margin, or 214 × 214 in the maximum-noise case. It does not support accurate operation at 1k × 1k; its stated size limits are substantially smaller. (LLM, conf=0.88)
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Firing Patterns and Synchronicity of Locally Active Memristor-Based Neuromorphic Circuits
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- Authors
- Sung, S. H., Kim, T. J., Shin, H., Im, T. H., & Lee, K. J.
- Affiliations
- Korea Advanced Institute of Science and Technology (KR)
- Corresponding author
- Lee, Keon Jae
- Venue
- Nature Communications
- Published
- 2022-05-19
- Volume
- 13
- Issue
- 1
- Pages
- 2811-2811
- ISSN
- 2041-1723 (ISSN-L)
- PMC
- PMC9120471
- OpenAlex
- W4280550359
- Cited by
- 146
- References
- 73
- Citations by year
- 2026: 22 · 2025: 56 · 2024: 35 · 2023: 27 · 2022: 6
- FWCI
- 8.49
- Type
- journal article
- Language
- en
- Open access
- gold
- doi.org
- Locations
- Nature Communications (publishedVersion, cc-by)
- PubMed Central (publishedVersion, cc-by)
- PubMed (publishedVersion)
- RePEc: Research Papers in Economics (submittedVersion)
- DOAJ (DOAJ: Directory of Open Access Journals) (submittedVersion, cc-by-sa)
- Funders
- Samsung (IO201214-08153-01)
- National Research Foundation of Korea (NRF- 2020M3C1B8081519, NRF- 2020M3F3A2A02082445)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
- Physical Sciences › Computer Science › Artificial Intelligence › Neural Networks and Reservoir Computing
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
- Keywords
- memristive synapses, synaptic plasticity, threshold switches, phase-change memory, neuromorphic hardware, nonvolatile switching, retraining, memristor arrays
- MeSH terms
- Learning, Neuronal Plasticity, Neurons, Synapses, Neural Networks, Computer
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