36.1 Unified In-Memory Dynamic TRNG and Multi-Bit Static PUF Entropy Generation for Ubiquitous Hardware Security
Open accessAbstract
Secure integrated systems routinely require the generation of keys in the form of dynamic entropy from True Random Number Generators (TRNGs), and static entropy from Physically Unclonable Functions (weak PUFs) as in Fig. 36.1.1, to support the execution of security protocols [1] -[8] (e.g., for system authentication, data confidentiality). In low-cost systems such as sensor nodes, unified implementations of TRNGs and/or PUFs have been demonstrated to reduce their cost and area, thanks to circuit reuse across two different functions, such as a TRNG with a PUF in a single standalone macro [1], and a TRNG with a data converter [2]. Similarly, SRAM-based PUFs have been widely explored and commercially used to exploit their omnipresent availability, and their high PUF key density per unit area (e.g., [3], [4]). However, existing SRAMs are not able to assume the function of a TRNG, and their PUF operation is limited to one bit per bitcell at most, whereas multi-bit/cell operation is currently restricted to non-SRAM PUFs [5].
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Si-CMOS-based tRNGs show excellent randomness and insensitivity to fabrication-induced variability.
“They show excellent randomness and insensitivity to fabrication-induced variability.”
From Cryptographic transistor for true random number generator with low power consumption (2024) · cites this paper as [23]
Si-CMOS-based tRNGs use circuitry with various types of entropy sources, such as timing jitter, chaotic maps, metastability, or noise jitter from SRAM bit-line leakages, for low power consumption.
“In contrast, Si-CMOS–based tRNGs use circuitry that uses various types of entropy sources, such as timing jitter, chaotic maps, metastability, or noise jitter from SRAM bit-line leakages for low power consumption.”
From Cryptographic transistor for true random number generator with low power consumption (2024) · cites this paper as [23]
Those entropy sources rely on operation-induced variations.
“Note that those entropy sources rely on operation-induced variations (19–23).”
From Cryptographic transistor for true random number generator with low power consumption (2024) · cites this paper as [23]
Cites
Phase Noise and Jitter in CMOS Ring Oscillators
Abidi, A. A. (2006) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2006.876206 · Cited by 740 · see citing works
Satpathy, S. K., Mathew, S. K., Kumar, R., Suresh, V., Anders, M. A., Kaul, H., Agarwal, A., Hsu, S., Krishnamurthy, R. K., & De, V. (2019) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2018.2886350 · Cited by 114 · see citing works
A 82-nW Chaotic Map True Random Number Generator Based on a Sub-Ranging SAR ADC
Kim, M., Ha, U., Lee, K. J., Lee, Y., & Yoo, H.-J. (2017) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2017.2694833 · Cited by 97 · see citing works
Kim, E., Lee, M., & Kim, J.-J. (2017) · 2017 IEEE International Solid-State Circuits Conference (ISSCC) · doi:10.1109/isscc.2017.7870302 · Cited by 79 · see citing works
Choi, Y., Karpinskyy, B., Ahn, K.-M., et al. (2020) · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · doi:10.1109/isscc19947.2020.9063075 · Cited by 45 · see citing works
Li, J., Yang, T., Yang, M., et al. (2018) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2018.2791460 · Cited by 38 · see citing works
Pamula, V. R., Sun, X., Kim, S., Rahman, F. U., Zhang, B., & Sathe, V. S. (2018) · 2018 IEEE Symposium on VLSI Circuits · doi:10.1109/vlsic.2018.8502375 · Cited by 36 · see citing works
A multi-bit/cell PUF using analog breakdown positions in CMOS
Chuang, K.-H., Bury, E., Degraeve, R., et al. (2018) · IEEE International Reliability Physics Symposium proceedings · doi:10.1109/irps.2018.8353655 · Cited by 19 · see citing works
Liu, K., Pu, H., & Shinohara, H. (2020) · IEEE Custom Integrated Circuits Conference (CICC) · doi:10.1109/cicc48029.2020.9075875 · Cited by 11 · see citing works
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Cryptographic transistor for true random number generator with low power consumption
Kim, S.-I., You, H.-J., Kim, M.-S., An, U.-S., Kim, M.-S., Lee, D. H., Ryu, S.-T., & Choi, Y.-K. (2024) · Science Advances · doi:10.1126/sciadv.adk6042 · Cited by 33 · see citing works
“This energy consumption outcome by the cryptoristor is comparable to those of other CMOS circuit-based tRNGs ( 19 – 23 ) and to those of non-CMOS–based tRNGs ( 11 – 18 ).”
- Authors
- Taneja, S., Rajanna, V. K., & Alioto, M.
- Affiliations
- National University of Singapore (SG)
- Venue
- 2021 IEEE International Solid-State Circuits Conference (ISSCC)
- Publisher
- IEEE
- Published
- 2021-02-13
- Pages
- 498-500
- ISSN
- 0193-6530 (ISSN-L)
- OpenAlex
- W3135413876
- Cited by
- 58
- References
- 9
- Citations by year
- 2026: 9 · 2025: 13 · 2024: 11 · 2023: 8 · 2022: 15 · 2021: 2
- FWCI
- 6.54
- Type
- conference paper
- Language
- en
- Open access
- Licence
- Locations
- Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference (publishedVersion)
- National University of Singapore (submittedVersion, public-domain)
- Funders
- National Research Foundation
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
- Physical Sciences › Computer Science › Artificial Intelligence › Cryptographic Implementations and Security
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Keywords
- true random number generator, physical unclonable functions, SRAM-based PUF, hardware security, key generation, sensor nodes, low-cost security
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