The DOI matches its Crossref record, with a small difference in title or year; 4 of the 4 references it cites were found in a registry or an index.
Improved Synaptic Behavior Under Identical Pulses Using AlO x /HfO 2 Bilayer RRAM Array for Neuromorphic Systems
Abstract
We analyze the response of identical pulses on a filamentary resistive memory (RRAM) to implement the synapse function in neuromorphic systems. Our findings show that the multilevel states of conductance are achieved by varying the measurement conditions related to the formation and rupture of a conductive filament. Furthermore, abrupt set switching behavior in the RRAM leads to an unchanged conductance state, leading to degradation in the accuracy of pattern recognition. Thus, we demonstrate a linear potentiation (or depression) behavior of conductance under identical pulses using the effect of barrier layer on the switching, which was realized by fabricating an RRAM on top of an Al electrode. As a result, when the range of the conductance is symmetrically controlled at both polarities, a significantly improved accuracy is achieved for pattern recognition using a neural network with a multilayer perceptron.
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Citations
Cites
Nanoscale Memristor Device as Synapse in Neuromorphic Systems
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“Hence, many studies have been conducted to implement the function of biological synapses into solid-state devices, which transfer data in the form of conductance in electronic systems, using ferroelectric memory, magnetic memory, phase change memory, and resistive memory (RRAM) [3]–[6].”
BackgroundNeuromorphic electronic systems
Mead, C. (1990) · Proceedings of the IEEE · doi:10.1109/5.58356 · Cited by 2,368
Burr, G. W., Shelby, R. M., Sidler, S., di Nolfo, C., Jang, J., Boybat, I., Shenoy, R. S., Narayanan, P., Virwani, K., Giacometti, E. U., et al. (2015) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2015.2439635 · Cited by 936
Self-citationBio-Inspired Stochastic Computing Using Binary CBRAM Synapses
Suri, M., Querlioz, D., Bichler, O., Palma, G., Vianello, E., Vuillaume, D., Gamrat, C., & DeSalvo, B. (2013) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2013.2263000 · Cited by 229
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Sorted by citations
Fully hardware-implemented memristor convolutional neural network
Yao, P., Wu, H., Gao, B., Tang, J., Zhang, Q., Zhang, W., Yang, J. J., & Qian, H. (2020) · Nature · doi:10.1038/s41586-020-1942-4 · Cited by 2,179
“Studies on memristor-based neuromorphic computing have covered a broad range of topics, from device optimization to system implementation 6,17–23 .”
BackgroundNeuro-Inspired Computing With Emerging Nonvolatile Memorys
Yu, S. (2018) · Proceedings of the IEEE · doi:10.1109/jproc.2018.2790840 · Cited by 1,170
“To make the SET process gradual, one way is the oxide stack engineering (i.e. bilayer oxides) to make weak or multiple weak filaments as demonstrated in TaOx/HfO2 [73] and AlOx/HfO2 [74] devices.”
BackgroundMethodInfluentialA crossbar array of magnetoresistive memory devices for in-memory computing
Jung, S., Lee, H., Myung, S., Kim, H., Yoon, S. K., Kwon, S.-W., Ju, Y., Kim, M., Yi, W., Han, S., et al. (2022) · Nature · doi:10.1038/s41586-021-04196-6 · Cited by 644
“Of the four NVMs that can be produced at volume—that is, resistive random-access memory 8–13 , phase-change random-access memory 14,15 , flash memory 16–19 and spin-transfer-torque magnetoresistive random-access memory (STT-MRAM, or MRAM for brevity) 20–22,25 , Here we fill this gap and implement…”
BackgroundFerroelectric FET analog synapse for acceleration of deep neural network training
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“[2] J. Woo, et al., “Improved synaptic behavior under identical pulses using AlOx/HfO2 bilayer RRAM array for neuromorphic systems,” IEEE Electron Device Lett., 37, 8, 994–997, 2016.”
BackgroundInfluentialHardware implementation of memristor-based artificial neural networks
Aguirre, F., Sebastian, A., Le Gallo, M., Song, W., Wang, T., Yang, J. J., Lu, W., Chang, M.-F., Ielmini, D., Yang, Y., et al. (2024) · Nature Communications · doi:10.1038/s41467-024-45670-9 · Cited by 564
“The weight update process is implemented by applying voltage or current pulses to the memristors (block 13 and 14), following the Write-Verify (or Close Loop Tunning) 194 – 196 , or the Write-without-Verify (or Open Loop Tunning) 103,107,197,198 .”
Metadata
- Authors
- Woo, J., Moon, K., Song, J., Lee, S., Kwak, M., Park, J., & Hwang, H.
- Affiliations
- Pohang University of Science and Technology (KR)
- Venue
- IEEE Electron Device Letters
- Published
- 2016-08
- Volume
- 37
- Issue
- 8
- Pages
- 994-997
- ISSN
- 0741-3106 (ISSN-L)
- 1558-0563
- OpenAlex
- W2462963692
- Cited by
- 512
- References
- 15
- Citations by year
- 2026: 22 · 2025: 45 · 2024: 59 · 2023: 80 · 2022: 74 · 2021: 65 · 2020: 70 · 2019: 38 · 2018: 39 · 2017: 19 · 2016: 1
- FWCI
- 14.91
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- IEEE Electron Device Letters (publishedVersion)
- Open Access System for Information Sharing (Pohang University of Science and Technology) (submittedVersion)
- Funders
- Ministry of Science, ICT and Future Planning through the Pioneer Research Center Program within the National Research Foundation of Korea (2012-0009460)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
- Physical Sciences › Computer Science › Artificial Intelligence › Neural Networks and Reservoir Computing
- Keywords
- resistive random access memory, synaptic behavior, neuromorphic systems, conductive filaments, set switching, barrier layer, pattern recognition, multilayer perceptron, resistive switching
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