The DOI matches its Crossref record; 5 of the 5 references it cites were found in a registry or an index.
Compact Modeling of RRAM Devices and Its Applications in 1T1R and 1S1R Array Design
Abstract
In this paper, we present a compact model for metal-oxide-based resistive random access memory (RRAM) devices with bipolar switching characteristics. The switching mechanism relies on the dynamics of conductive filament growth/dissolution in the oxide layer. Besides the dc and pulsed I-V characteristics, the model also captures the RRAM retention property and the temperature dynamics. The model parameters and the device variations are calibrated from the experimental data of IMEC HfOx-based RRAM devices. The model has been implemented in Verilog-A, which can be easily adapted into the SPICE simulator for the circuit-level analysis. As case studies, we demonstrate the model's applications on the programming scheme design of the 1-transistor-1-resistor array, as well as the design space exploration of the 1-selector-1-resistor cross-point array toward megabit-level.
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Cites
Crossbar RRAM Arrays: Selector Device Requirements During Read Operation
Zhou, J., Kim, K.-H., & Lu, W. (2014) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2014.2310200 · Cited by 310
Chen, A. (2013) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2013.2246791 · Cited by 230 · cited 1×
“well-known sneak path problem in the cross-point architecture [8], [9].”
BackgroundCrossbar RRAM Arrays: Selector Device Requirements During Write Operation
Kim, S., Zhou, J., & Lu, W. D. (2014) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2014.2327514 · Cited by 219
Yu, S., Gao, B., Fang, Z., Yu, H., Kang, J., & Wong, H.-S. P. (2012) · 2012 International Electron Devices Meeting · doi:10.1109/iedm.2012.6479018 · Cited by 213
Self-citation3D-stackable crossbar resistive memory based on Field Assisted Superlinear Threshold (FAST) selector
Jo, S. H., Kumar, T., Narayanan, S., Lu, W. D., & Nazarian, H. (2014) · 2014 IEEE International Electron Devices Meeting · doi:10.1109/iedm.2014.7046999 · Cited by 162 · cited 3×
“Among them, the field-assisted superlinear threshold (FAST) selector [30] exhibits excellent performance, which shows outstanding selectivity (>1011), small switching slope”
BackgroundMethodInfluential
Research works printed but not linked: 29
- zhang, 2014, Selector design considerations and requirements for 1SIR RRAM crossbar array, Proc IEEE Int Memory Workshop (IMW), 1
- 10.1109/LED.2011.2161601 · DOI
- lee, 2012, Varistor-type bidirectional switch (JMAX > 107 A/cm2, selectivity~104) for 3D bipolar resistive memory arrays, Proc Symp VLSI Technol (VLSIT), 37
- long, 2013, Compact analytical models for the SET and RESET switching statistics of RRAM inspired in the cell-based percolation model of gate dielectric breakdown, Proc IEEE Int Rel Phys Symp (IRPS), 5a.6.1
- 10.1109/TED.2013.2287755 · DOI · Paper page
- 10.1109/TED.2013.2296793 · DOI
- 10.1109/TED.2014.2329020 · DOI
- 10.1109/LED.2012.2210856 · DOI · Paper page
- 10.1109/SISPAD.2014.6931558 · DOI
- 10.1109/TNS.2014.2365493 · doi:10.1109/tns.2014.2365493
- 10.1109/TED.2012.2218607 · DOI · Paper page
- chen, 2013, Improvement of data retention in HfO2/Hf 1T1R RRAM cell under low operating current, Proc IEEE Int Electron Devices Meeting (IEDM), 10.1.1
- fantini, 2013, Intrinsic switching variability in HfO2 RRAM, Proc IEEE Int Memory Workshop (IMW), 30
- 0, International Technology Roadmap for Semiconductors (ITRS)
- 10.1109/TED.2011.2167513 · DOI · Paper page
- 10.1109/LED.2015.2420665 · DOI
- 10.1109/LED.2009.2032308 · DOI · Paper page
- 10.1109/JSSC.2013.2280296 · DOI · Paper page
- virwani, 2012, Sub-30 nm scaling and high-speed operation of fully-confined access-devices for 3D crosspoint memory based on mixed-ionic-electronic-conduction (MIEC) materials, Proc IEEE Int Electron Device Meeting (IEDM), 2.7.1
- 10.1109/JSSC.2012.2215121 · DOI · Paper page
- 10.1109/TED.2010.2062187 · DOI · Paper page
- burr, 2014, Access devices for 3D crosspoint memory, J Vac Sci Technol B, 32, 40802, 10.1116/1.4889999 · DOI · Paper page
- 10.1109/JPROC.2012.2190369 · DOI · Paper page
- 10.1109/JPROC.2010.2070830 · DOI · Paper page
- 0, ASU RRAM Model
- 10.1063/1.1565180 · DOI · Paper page
- 10.1063/1.3679610 · DOI
- butcher, 2005, Numerical Methods for Ordinary Differential Equations
- 10.1109/TED.2015.2450760 · DOI
Cited by
Emerging Memory Technologies: Recent Trends and Prospects
Yu, S., & Chen, P.-Y. (2016) · IEEE Solid-State Circuits Magazine · doi:10.1109/mssc.2016.2546199 · Cited by 555
Self-citationUnderstanding memristive switching via in situ characterization and device modeling
Sun, W., Gao, B., Chi, M., Xia, Q., Yang, J. J., Qian, H., & Wu, H. (2019) · Nature Communications · doi:10.1038/s41467-019-11411-6 · Cited by 482
An ADC-Less RRAM-Based Computing-in-Memory Macro With Binary CNN for Efficient Edge AI
Li, Y., Chen, J., Wang, L., Zhang, W., Guo, Z., Wang, J., Han, Y., Li, Z., Wang, F., Dou, C., et al. (2023) · IEEE Transactions on Circuits and Systems II: Express Briefs · doi:10.1109/tcsii.2022.3233396 · Cited by 38
Metadata
- Authors
- Chen, P.-Y., & Yu, S.
- Venue
- IEEE Transactions on Electron Devices
- Published
- 2015-12
- Volume
- 62
- Issue
- 12
- Pages
- 4022-4028
- ISSN
- 0018-9383 (ISSN-L)
- 1557-9646
- OpenAlex
- W2162279286
- Cited by
- 364
- References
- 5
- FWCI
- 10.10
- Type
- journal article
- Language
- en
- Open access
- closed
- Funders
- Division of Computing and Communication Foundations through the National Science Foundation (1449653)
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