High temperature gate-bias and reverse-bias tests on SiC MOSFETs

Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits

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The impact of gate-induced drain leakage current on MOSFET scaling

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Time Dependence of Bias-Stress-Induced SiC MOSFET Threshold-Voltage Instability Measurements

Lelis, A. J., Habersat, D. B., Green, R., Ogunniyi, A. A., Gurfinkel, M., Suehle, J. S., & Goldsman, N. (2008) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2008.926672 · Cited by 327 · see citing works

Characterization of Transient Gate Oxide Trapping in SiC MOSFETs Using Fast $I$–$V$ Techniques

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Application of reliability test standards to SiC Power MOSFETs

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Reliability of SiC power devices and its influence on their commercialization - review, status, and remaining issues

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Temperature-Dependence of SiC MOSFET Threshold-Voltage Instability

Lelis, A. J., Habersat, D. B., Green, R., et al. (2008) · Materials science forum · doi:10.4028/www.scientific.net/msf.600-603.807 · Cited by 52 · see citing works

A comprehensive study of hot carrier stress-induced drain leakage current degradation in thin-oxide n-MOSFETs

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Junction leakage current degradation under high temperature reverse-bias stress induced by band-defect-band tunnelling in power VDMOS

Barletta, G., & Currò, G. (2005) · Microelectronics Reliability · doi:10.1016/j.microrel.2004.11.008 · Cited by 14 · see citing works

Observation of negative bias temperature instabilities in parasitic p-channel MOSFETs occurring during high-temperature reverse-bias stressing of trench-gated n-channel MOSFETs

Hao, J., Rioux, M., & Awadelkarim, O. O. (2011) · IEEE International Integrated Reliability Workshop final report · doi:10.1109/iirw.2011.6142607 · Cited by 9 · see citing works

Advances in silicon carbide MOS technology

Mawby, P., Kampouris, C., & Koh, A. (2003) · doi:10.1109/miel.2002.1003146 · Cited by 4 · see citing works

Overview of Real-Time Lifetime Prediction and Extension for SiC Power Converters

Ni, Z., Lyu, X., Yadav, O. P., Singh, B. N., Zheng, S., & Cao, D. (2020) · IEEE Transactions on Power Electronics · doi:10.1109/tpel.2019.2962503 · Cited by 261 · see citing works

Evaluation of Aging's Effect on Temperature-Sensitive Electrical Parameters in SiC mosfets

Yang, F., Ugur, E., & Akin, B. (2020) · IEEE Transactions on Power Electronics · doi:10.1109/tpel.2019.2950311 · Cited by 121 · see citing works

High temperature pulsed-gate robustness testing of SiC power MOSFETs

Fayyaz, A., & Castellazzi, A. (2015) · Microelectronics Reliability · doi:10.1016/j.microrel.2015.06.141 · Cited by 40 · see citing works

Investigation on Degradation of SiC MOSFET Under Accelerated Stress in a PFC Converter

Jiang, X., Wang, J., Chen, J., Yu, H., Li, Z., & John Shen, Z. (2021) · IEEE Journal of Emerging and Selected Topics in Power Electronics · doi:10.1109/jestpe.2020.2988447 · Cited by 39 · see citing works

AC Power Cycling Test Setup and Condition Monitoring Tools for SiC-Based Traction Inverters

Farhadi, M., Vankayalapati, B. T., Sajadi, R., & Akin, B. (2023) · IEEE Transactions on Vehicular Technology · doi:10.1109/tvt.2023.3271251 · Cited by 24 · see citing works

SiC MOSFETs robustness for diode-less applications

Avino-Salvado, O., Cheng, C., Buttay, C., Morel, H., Labrousse, D., Lefebvre, S., & Ali, M. (2018) · EPE Journal · doi:10.1080/09398368.2018.1456836 · Cited by 17 · see citing works

A Critical Review on Reliability and Short Circuit Robustness of Silicon Carbide Power MOSFETs

Sreejith, S., Ajayan, J., Devasenapati, S. B., Sivasankari, B., & Tayal, S. (2023) · Silicon · doi:10.1007/s12633-022-02039-1 · Cited by 11 · see citing works

Research on Threshold Voltage Instability in SiC MOSFET Devices with Precision Measurement

Liu, A., Bai, S., Huang, R. H., et al. (2019) · Materials science forum · doi:10.4028/www.scientific.net/msf.954.133

A Compact Model of Negative Bias Temperature Instability Suitable for Gate-Level Circuit Simulation

Liu, X., Bernardini, A., Schlichtmann, U., et al. (2019) · International Symposium on Quality Electronic Design (ISQED) · doi:10.1109/isqed.2019.8697494

NBTI-aware dual threshold voltage assignment for leakage power reduction

Tu, W.-P., Wu, S.-W., Huang, S.-H., et al. (2012) · IEEE International Symposium on Circuits and Systems proceedings · doi:10.1109/iscas.2012.6272033 · Cited by 6 · see citing works

Threshold voltage instability of a static RAM under 77-K operation

Watanabe, Y. (1984) · IEEE Transactions on Electron Devices · doi:10.1109/t-ed.1984.21808 · Cited by 2 · see citing works

Numerical simulation of DB-NBTI degradation introduced by different length of interface charges

Sun, R.-Z., He, W., & Cao, J.-M. (2016) · International Conference on Integrated Circuits and Microsystems (ICICM) · doi:10.1109/icam.2016.7813588 · Cited by 1 · see citing works