The DOI matches its Crossref record; 29 of the 29 references it cites were found in a registry or an index.
A hybrid nanomemristor/transistor logic circuit capable of self-programming
Open accessAbstract
Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metal-oxide-semiconductor field effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally configured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information. As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/amplifier outputs. By routing the output signal of a logic operation back onto a target memristor inside the array, the crossbar was conditionally configured by setting the state of a nonvolatile switch. Such conditional programming illuminates the way for a variety of self-programmed logic arrays, and for electronic synaptic computing.
Overview
The claims and statistics of this paper haven’t been checked yet.
Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.
Integrity signals
Registry
Cites
Statistics
Verification
Claims the paper makes
The claims and statistics of this paper haven’t been checked yet.
Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.
Claims other papers make about this one
Each is checked against this paper’s own text: does it say what the citing paper says it does?
In the citing paper
“They can also be used to implement digital logic [9], synapses in neural applications [10,11], and hybrid circuits [6,12].”
From Sub-nanosecond switching of a tantalum oxide memristor (2011) · cites this paper as [12]
Self-check
Percentages, sums and reported differences re-computed from the paper’s own numbers.
The self-check needs the paper’s full text.
Citations
Cites
Strukov, D. B., Snider, G. S., Stewart, D. R., & Williams, R. S. (2008) · Nature · doi:10.1038/nature06932 · Cited by 11,828
Self-citationMemristor—The Missing Circuit Element
Chua, L. (1971) · IEEE Transactions on Circuit Theory · doi:10.1109/tct.1971.1083337 · Cited by 10,268 · cited 4×
“Memristance is very interesting for a variety of digital and analog switching applications (1, 2), especially because a memristor does not lose its state when the electrical power is turned off (the memory is nonvolatile).”
BackgroundInfluentialConductance of a Molecular Junction
Reed, M. A., Zhou, C., Muller, C. J., Burgin, T. P., & Tour, J. M. (1997) · Science · doi:10.1126/science.278.5336.252 · Cited by 3,463
Memristive switching mechanism for metal/oxide/metal nanodevices
Yang, J. J., Pickett, M. D., Li, X., Ohlberg, D. A. A., Stewart, D. R., & Williams, R. S. (2008) · Nature Nanotechnology · doi:10.1038/nnano.2008.160 · Cited by 2,987
Self-citationMemristive devices and systems
Chua, L. O., & Kang, S. M. (1976) · Proceedings of the IEEE · doi:10.1109/proc.1976.10092 · Cited by 2,604
Imprint Lithography with 25-Nanometer Resolution
Chou, S. Y., Krauss, P. R., & Renstrom, P. J. (1996) · Science · doi:10.1126/science.272.5258.85 · Cited by 2,288
Logic Gates and Computation from Assembled Nanowire Building Blocks
Huang, Y., Duan, X., Cui, Y., Lauhon, L. J., Kim, K.-H., & Lieber, C. M. (2001) · Science · doi:10.1126/science.1066192 · Cited by 2,125
Carbon Nanotube-Based Nonvolatile Random Access Memory for Molecular Computing
Rueckes, T., Kim, K., Joselevich, E., Tseng, G. Y., Cheung, C. L., & Lieber, C. M. (2000) · Science · doi:10.1126/science.289.5476.94 · Cited by 1,716
Electronically Configurable Molecular-Based Logic Gates
Collier, C. P., Wong, E. W., Bělohradský, M., Raymo, F. M., Stoddart, J. F., Kuekes, P. J., Williams, R. S., & Heath, J. R. (1999) · Science · doi:10.1126/science.285.5426.391 · Cited by 1,519
Self-citationConductance Switching in Single Molecules Through Conformational Changes
Donhauser, Z. J., Mantooth, B. A., Kelly, K. F., Bumm, L. A., Monnell, J. D., Stapleton, J. J., Price, D. W. J., Rawlett, A. M., Allara, D. L., Tour, J. M., et al. (2001) · Science · doi:10.1126/science.1060294 · Cited by 1,246
Cited by
Sorted by citations
Items 201–270 of 270
Modeling Memristor–Based Circuit Networks on Crossbar Architectures
Vourkas, I., & Sirakoulis, G. C. (2019) · Springer eBooks · doi:10.1007/978-3-319-76375-0_34 · Cited by 3
Cartesian Genetic Programming for Memristive Logic Circuits
Howard, G. D., Bull, L., & Adamatzky, A. (2012) · Lecture notes in computer science · doi:10.1007/978-3-642-29139-5_4 · Cited by 3
Modeling, Fabrication, and Characterization of Memristors
Mazady, A. (2014) · Cited by 3
Organic memristive device and its application for the information processing
Erokhin, V. V., & Fontana, M. P. (2010) · IEEE International Conference on Electronics, Circuits and Systems (ICECS) · doi:10.1109/icecs.2010.5724664 · Cited by 3
Bose, S. K., Shirai, S., Mallinson, J. B., Acharya, S. K., Galli, E., & Brown, S. A. (2018) · IEEE International Conference on Nanotechnology (IEEE-NANO) · doi:10.1109/nano.2018.8626230 · Cited by 3
Robustness of logic gates and reconfigurability of neuromorphic switching networks
Chiragwandi, Z. G., Sköldberg, J., & Wendin, G. P. (2010) · IEEE International Symposium on Circuits and Systems proceedings · doi:10.1109/iscas.2010.5537493 · Cited by 2
Memristor-based material implication logic design for full adders
Li, M., Sun, W., Lu, Z., Chen, S., & Wu, F. (2017) · IEEE International Conference on ASIC (ASICON) · doi:10.1109/asicon.2017.8252465 · Cited by 2
Chua, L. O. (2019) · Springer eBooks · doi:10.1007/978-3-319-76375-0_1 · Cited by 2
A Programmable Circuit Based on the Combination of VTM Cellular Crossbars
Mozafari, F., Ahmadi, M., & Ahmadi, A. (2023) · International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design · doi:10.1109/smacd58065.2023.10192103 · Cited by 2
Hybrid CMOS-Memristor Logic for Boosting the Power-Efficiency in Error Tolerant Applications
Pokharia, M., Prasad, K., Hegde, R. S., & Mekie, J. (2024) · International Conference on VLSI Design · doi:10.1109/vlsid60093.2024.00078 · Cited by 2
Pokharia, M., Trivedi, H., Doshi, S., Hegde, R. S., & Mekie, J. (2025) · International Conference on VLSI Design · doi:10.1109/vlsid64188.2025.00092 · Cited by 2
1S-1R array: Pure-memristor circuit for binary neural networks
Zhang, Z., Ge, Z., Wei, Y., Cheng, X., Xie, G., & Liu, G. (2021) · Microelectronic Engineering · doi:10.1016/j.mee.2021.111697 · Cited by 2
Spike-Timing-Dependent-Plasticity in Hybrid Memristive-CMOS Spiking Neuromorphic Systems
Serrano‐Gotarredona, T., & Linares-Barranco, B. (2013) · Springer eBooks · doi:10.1007/978-1-4614-9068-5_12 · Cited by 2
Key process study in nanoimprint lithography
Wang, Z., Liu, W., Wang, L., Zuo, Q., & Zhao, Y. (2012) · Journal of Semiconductors · doi:10.1088/1674-4926/33/10/106002 · Cited by 2
Fabrication and design of nanoscale regular circuits
Jamaa, B. (2009) · Infoscience (Ecole Polytechnique Fédérale de Lausanne) · doi:10.5075/epfl-thesis-4477 · Cited by 2
A Complex of the Electromagnetic Biosensors with a Nanowired Pickup
Sklyar, R. (2009) · Journal of Sensors · doi:10.1155/2009/516850 · Cited by 2
Polymer-Based Memory Structures on Copper Substrates
Yahyaie, I., Khaper, T., Giesbrecht, P. K., & Freund, M. S. (2014) · Journal of The Electrochemical Society · doi:10.1149/2.100406jes · Cited by 2
Shape-shifting digital hardware concept: Towards a new adaptive computing system
Almudéver, C. G., Rubio, A., Martin-Martinez, J., Crespo-Yepes, A., Rodriguez, R., & Nafria, M. (2012) · NASA/ESA Conference on Adaptive Hardware and Systems (AHS) · doi:10.1109/ahs.2012.6268646 · Cited by 2
Characterization of memristive Poly-Si Nanowires via empirical physical modelling
Archontas, N., Georgiou, J., Jamaa, M. H. B., Carrara, S., & Micheli, G. D. (2010) · IEEE International Symposium on Circuits and Systems proceedings · doi:10.1109/iscas.2010.5537496 · Cited by 2
DC Circuit Model of TiO2-based Memristors
Mazady, A., & Anwar, M. F. (2015) · International Journal of High Speed Electronics and Systems · doi:10.1142/s0129156415500044 · Cited by 2
Integration of memristors with MEMS in different circuit configurations
Almeida, S. F., Kachmar, G. K., Mireles, J., Pierluissi, J. H., MacDonald, E. W., Garica, E. J., & Zubía, D. (2013) · Cited by 2
ESNreram: An Energy-Efficient Sparse Neural Network Based on Resistive Random-Access Memory
Song, Z., Zhao, Y., Sun, Y., Liang, X., & Jiang, L. (2020) · ACM Great Lakes Symposium on VLSI (GLSVLSI) · doi:10.1145/3386263.3406897 · Cited by 2
Oxide Based Memristive Nanodevices
Yang, J. J., & Medeiros‐Ribeiro, G. (2014) · Springer eBooks · doi:10.1007/978-1-4899-7537-9_6 · Cited by 2
Memristor-Based Resistive Computing
Kang, S.-M. S., & Shin, S. (2013) · Springer eBooks · doi:10.1007/978-1-4614-9068-5_10 · Cited by 2
Memristor in digital logic circuit: Fabrication and proof of concept
Khairir, N. S., Sharin, N. F., Dzulkifli, M. R., Halim, I. S. A., Hassan, S. L. M., Bakar, R. A., Abdullah, W. F. H., & Herman, S. H. (2014) · IEEE Student Conference on Research and Development (SCOReD) · doi:10.1109/scored.2014.7072990 · Cited by 2
High density crossbar structure for memory application
Kim, S. (2011) · Deep Blue (University of Michigan) · Cited by 2
Experimental demonstration of associative memory with memristive neural networksPreprint
Pershin, Y. V., & Ventra, M. D. (2009) · arXiv (Cornell University) · doi:10.48550/arxiv.0905.2935 · Cited by 8
On memfractance of plants and fungiPreprint
Beasley, A. E., Abdelouahab, M.-S., Lozi, R., Powell, A. L., & Adamatzky, A. (2020) · arXiv (Cornell University) · doi:10.48550/arxiv.2005.10500 · Cited by 2
Systematic Generation of Memristor-Transistor Single-Phase Combinational Logic Cells
Biswas, B. R., Yuan, C., Wang, F., & Gupta, S. K. (2024) · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · doi:10.1109/tcad.2024.3384012 · Cited by 1
Fast and compact simulation models for a variety of FET nano devices by the CMOS EKV equations
Serrano‐Gotarredona, T., Linares-Barranco, B., Agnus, G., Derycke, V., Bourgoin, J. ‐., Alibart, F., Vuillaume, D., Sohn, J., Bendall, J., Welland, M., et al. (2009) · DIGITAL.CSIC (Spanish National Research Council (CSIC)) · Cited by 1
Norris, K. J., Yang, J. J., & Kobayashi, N. P. (2015) · MRS Proceedings · doi:10.1557/opl.2015.770 · Cited by 1
Modeling of Memristive Devices for Neuromorphic Application
Zayer, F., Dghais, W., & Belagcem, H. (2017) · Lecture notes in networks and systems · doi:10.1007/978-3-319-72215-3_8 · Cited by 1
Alharbi, A. G., & Chowdhury, M. (2020) · Springer eBooks · doi:10.1007/978-3-030-51882-0_1
Teodorovic, P., Vukobratović, B. Z., STRUHARIK, R. J. R., Dautović, S., Nauka, F. T., & Sad, N. (2012) · Telecommunications Forum (TELFOR) · doi:10.1109/telfor.2012.6419391 · Cited by 1
A memristor-based 6T1M hybrid memory cell without state drift during successive read
Sakib, M. N., Hassan, R., & Biswas, S. (2016) · International Conference on Electrical and Computer Engineering (ICECE) · doi:10.1109/icece.2016.7853891 · Cited by 1
Circuit Design Steps for Nano-Crossbar Arrays: Area-Delay-Power Optimization With Fault Tolerance
Morgul, M. C., Frontini, L., Tunali, O., Anghel, L., Ciriani, V., Vatajelu, E. I., Moritz, C. A., Stan, M. R., Alexandrescu, D., & Altun, M. (2020) · IEEE Transactions on Nanotechnology · doi:10.1109/tnano.2020.3044017 · Cited by 1
Harmonic Analysis of the Nonlinear Response of Graphene Oxide-Based Memristors
Vercik, A. (2021) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2021.3103490 · Cited by 1
Early Design Space Exploration Framework for Memristive Crossbar Arrays
Zaman, M. A., Joshi, R., & Katkoori, S. (2022) · ACM Journal on Emerging Technologies in Computing Systems · doi:10.1145/3461644 · Cited by 1
CMOS-Memristive Analog Multiplier DesignPreprint
Kalysh, I., Krestinskaya, O., & James, A. P. (2018) · arXiv (Cornell University) · doi:10.48550/arxiv.1805.07735 · Cited by 1
An Image Encryption Algorithm Based on a New Memristor Chaotic System and DNA VariationPreprint
Xiong, L., Li, P., Zhang, Y., Yang, F., & Ma, C. (2021) · Research Square · doi:10.21203/rs.3.rs-309375/v1 · Cited by 1
Talukder, S. R., Rafid, M. T. M. K., & Bhuiyan, A. B. M. N. (2024) · Research Square · doi:10.21203/rs.3.rs-4367214/v1 · Cited by 1
Variability-aware architectures based on hardware redundancy for nanoscale reliable computation
Aymerich, N. (2013) · doi:10.5821/dissertation-2117-95273 · Cited by 1
Bi-channel memristor memory: A design methodology based on current feedback
Li, W., Shen, Y., & Jisheng, W. (2015) · Chinese Control Conference (CCC) · doi:10.1109/chicc.2015.7260109
Fabrication of Nanowire Crossbars
Jamaa, M. H. B. (2011) · Lecture notes in electrical engineering · doi:10.1007/978-94-007-0650-7_2
A shapeshifting evolvable hardware mechanism based on reconfigurable memFETs crossbar architecture
Martin-Martinez, J., Almudéver, C. G., Crespo-Yepes, A., Rodriguez, R., Nafria, M., & Rubio, A. (2014) · Microelectronics Reliability · doi:10.1016/j.microrel.2014.03.020
Fabric Mapping and Placement of Field Programmable Stateful Logic Array
Kim, K. (2012) · Journal of the Institute of Electronics and Information Engineers · doi:10.5573/ieek.2012.49.12.209
The state of the art of memristive neural systems: Models and applications
Wu, A., Zeng, Z., & Fu, C. (2014) · International Joint Conference on Neural Networks (IJCNN) · doi:10.1109/ijcnn.2014.6889375
On the performance of a hybrid memristor/MOS π-attenuator circuit
Wey, T. A., & Jemison, W. D. (2014) · IEEE International New Circuits and Systems Conference (NEWCAS) · doi:10.1109/newcas.2014.6934059
NanoV: nanowire-based VLSI design
Simsir, M. O., & Jha, N. K. (2010) · International Symposium on Nanoscale Architectures · doi:10.5555/1835957.1835972
Nonlinear Dynamics of Memristor Based 2 nd and 3 rd Order Oscillators
Abdullah, K. (2011)
Квантовый нейристор: от теории к эксперименту
Grigor’ev, S. L. (2017) · Журнал технической физики · doi:10.21883/jtf.2017.07.44689.2096
Quantum neuristor: From theory to experiment
Grigor’ev, S. L. (2017) · Technical Physics · doi:10.1134/s1063784217070040
Notice of Retraction: CMOS-Memristive Analog Multiplier Design
Kalysh, I., Krestinskaya, O., & James, A. P. (2018) · International Conference on Computing and Network Communications · doi:10.1109/coconet.2018.8476883
RetractedReliable High Density Stacked Memristor Memory Designs
Vadivelmurugan, S. (2018) · doi:10.14569/specialissue.2018.0901123
NanoV: Nanowire-based VLSI design
Simsir, M. O., & Jha, N. K. (2010) · IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) · doi:10.1109/nanoarch.2010.5510925
Yu, H., & Wang, Y. (2014) · Springer eBooks · doi:10.1007/978-1-4939-0551-5_4
Mathematical simulation of memristive for classification in machine learning
Hasan, A. A., Abdullah, N. A. Z., & Abbood, A. D. (2022) · Periodicals of Engineering and Natural Sciences (PEN) · doi:10.21533/pen.v10i2.2793
Vectorization Calculation Method of the Fractional-Order Mem-Elements
Xu, X. M., Si, G., Guo, Z., & Oresanya, B. O. (2022) · Lecture notes in networks and systems · doi:10.1007/978-3-031-04383-3_11
Thomas, A., & Kaltschmidt, C. (2019) · Springer eBooks · doi:10.1007/978-3-319-76375-0_21
Memristor-Based Material Implication Logic: Prelude to In-Memory Computing
Mazady, A., & Anwar, M. F. (2023) · International Journal of High Speed Electronics and Systems · doi:10.1142/s0129156423500210
Mem-Fractive Properties of Fungi
Beasley, A. E., Abdelouahab, M.-S., Lozi, R., Tsompanas, M., & Adamatzky, A. (2023) · Emergence, complexity and computation · doi:10.1007/978-3-031-38336-6_15
Functionalising the electrical properties of Kombucha zoogleal mats for biosensing applicationsPreprint
Nikolaidou, A. E., Chiolerio, A., Dehshibi, M. M., & Adamatzky, A. (2024) · bioRxiv (Cold Spring Harbor Laboratory) · doi:10.1101/2024.01.21.576528
Design Of Three-Valued Logic Gates Based on Knowm Memristors
Zhou, K., Fan, Q., & Wang, D. (2025) · Asia Conference on Energy and Electrical Engineering (ACEEE) · doi:10.1109/aceee66257.2025.11148977
Mehdipour, S., Dasgupta, M., & Daneshvar, M. (2026) · SSRN Electronic Journal · doi:10.2139/ssrn.6283411
Shahsavari, M. (2016) · theses.fr (ABES) · doi:10.70675/fdb24fc2z042ez4217z8e2ez3082ebe09c91
FLEX-DIV: Floating-Point Low-Power Approximate Divider Using Memristor-Based Logic
Pokharia, M., Trivedi, H., Sivanarayana, P. T., Hegde, R. S., & Mekie, J. (2026) · Integration · doi:10.1016/j.vlsi.2026.102841
MEMRISTOR - OLD HISTORY AND NEW DEVELOPMENT
Garczarczyk, Z. A. (2009) · Prace Naukowe Politechniki Śląskiej. Elektryka
Metadata
- Authors
- Borghetti, J., Li, Z., Straznicky, J., Li, X., Ohlberg, D. A. A., Wu, W., Stewart, D. R., & Williams, R. S.
- Affiliations
- Hewlett-Packard (United States) (US)
- Venue
- Proceedings of the National Academy of Sciences
- Publisher
- National Academy of Sciences
- Published
- 2009-02-10
- Volume
- 106
- Issue
- 6
- Pages
- 1699-1703
- ISSN
- 0027-8424 (ISSN-L)
- 1091-6490
- PMC
- PMC2631082
- OpenAlex
- W2064632620
- Cited by
- 270
- References
- 29
- Citations by year
- 2026: 3 · 2025: 3 · 2024: 8 · 2023: 6 · 2022: 5 · 2021: 11 · 2020: 13 · 2019: 16 · 2018: 18 · 2017: 21 · 2016: 11 · 2015: 23 · 2014: 18 · 2013: 26 · 2012: 21
- FWCI
- 22.98
- Type
- journal article
- Language
- en
- Open access
- green
- www.ncbi.nlm.nih.gov
- Locations
- Proceedings of the National Academy of Sciences (publishedVersion)
- PubMed Central (publishedVersion)
- PubMed (publishedVersion)
- Funders
- Defense Advanced Research Projects Agency
- Advanced Research Projects Agency
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advancements in Semiconductor Devices and Circuit Design
- Keywords
- memristor crossbar, Boolean circuits, nanoimprint lithography, nonvolatile switching
- MeSH terms
- Computers, Transistors, Electronic, Nanotechnology
About these checks
Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
Statistics and arithmetic are recomputed, not judged.
Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.
What counts as a claim ›How we measure confidence ›How we check this ›
Are you an author, or do you see a problem with this page? Request a review
