The DOI matches its Crossref record; 37 of the 40 references it cites were found in a registry or an index.
Impact of Non-Ideal Characteristics of Resistive Synaptic Devices on Implementing Convolutional Neural Networks
Abstract
Emerging non-volatile memory (eNVM) based resistive synaptic devices have shown great potential for implementing deep neural networks (DNNs). However, the eNVM devices typically suffer from various non-ideal effects which may degrade the performance of the system. Based on a representative convolutional neural network (CNN) model for CIFAR-10 dataset, this paper comprehensively investigates the impact of those nonideal characteristics, such as nonlinearity and asymmetry of conductance tuning, variations, endurance and retention, on the training/inference accuracy. The compact models of the device non-ideal effects are incorporated into the TensorFlow framework. Our simulation results suggest that 1) the training accuracy is more sensitive to the asymmetry of conductance tuning than the nonlinearity; 2) the conductance range variation does not degrade the training accuracy, instead, a small variation can even reduce the accuracy loss introduced by asymmetry; 3) device-to-device variation can also remedy the accuracy loss due to asymmetry while cycle-to-cycle variation leads to significant accuracy degradation; 4) the accuracy degradation will not be noticeable if the endurance cycles are more than 7,000 cycles; and 5) different drifting modes affect the inference accuracy differently, and the best case is where the conductance is drifting up/down randomly.
Overview
Integrity signals
Registry
Cites
Statistics
Verification
Claims the paper makes
Claims other papers make about this one
Each is checked against this paper’s own text: does it say what the citing paper says it does?
In the citing paper
“Due to fabrication imperfections, non-ideal behaviors are observed in memristor and memcapacitor devices. These include variations in conductance, capacitance, device-todevice (D2D), and cycle-to-cycle (C2C), as well as nonlinearity and programming failure [28].”
From Framework for In-Memory Computing Based on Memristor and Memcapacitor for On-Chip Training (2023) · cites this paper as [28]
Citations
Cites
Deep Residual Learning for Image Recognition
He, K., Zhang, X., Ren, S., & Sun, J. (2016) · 2016 IEEE Conference on Computer Vision and Pattern Recognition (CVPR) · doi:10.1109/cvpr.2016.90 · Cited by 235,474
Very Deep Convolutional Networks for Large-Scale Image Recognition
Simonyan, K., & Zisserman, A. (2014) · arXiv · doi:10.48550/arxiv.1409.1556 · Cited by 114,148
Nanoscale Memristor Device as Synapse in Neuromorphic Systems
Jo, S. H., Chang, T., Ebong, I., Bhadviya, B. B., Mazumder, P., & Lu, W. (2010) · Nano Letters · doi:10.1021/nl904092h · Cited by 4,174
Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks
Chen, Y.-H., Krishna, T., Emer, J. S., & Sze, V. (2017) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2016.2616357 · Cited by 3,247
Training and operation of an integrated neuromorphic network based on metal-oxide memristors
Prezioso, M., Merrikh-Bayat, F., Hoskins, B. D., Adam, G. C., Likharev, K. K., & Strukov, D. B. (2015) · Nature · doi:10.1038/nature14441 · Cited by 3,001
Courbariaux, M., Hubara, I., Soudry, D., El-Yaniv, R., & Bengio, Y. (2016) · arXiv · doi:10.48550/arxiv.1602.02830 · Cited by 2,106
Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing
Kuzum, D., Jeyasingh, R. G. D., Lee, B., & Wong, H.-S. P. (2012) · Nano Letters · doi:10.1021/nl201040y · Cited by 1,267 · cited 3×
“In recent years, emerging non-volatile memory (eNVM) based resistive synaptic devices [5], such as phase change memory (PCM) [6], [7], resistive random access memory (RRAM) [8]–[11], and ferroelectric field effect transistor (FeFET) [12], [13] are considered as promising candidates to replace SRAM cells due to the sma…”
BackgroundNeuro-Inspired Computing With Emerging Nonvolatile Memorys
Yu, S. (2018) · Proceedings of the IEEE · doi:10.1109/jproc.2018.2790840 · Cited by 1,170
Self-citationEquivalent-accuracy accelerated neural-network training using analogue memory
Ambrogio, S., Narayanan, P., Tsai, H., Shelby, R. M., Boybat, I., di Nolfo, C., Sidler, S., Giordano, M., Bodini, M., Farinha, N. C. P., et al. (2018) · Nature · doi:10.1038/s41586-018-0180-5 · Cited by 1,151
Burr, G. W., Shelby, R. M., Sidler, S., di Nolfo, C., Jang, J., Boybat, I., Shenoy, R. S., Narayanan, P., Virwani, K., Giacometti, E. U., et al. (2015) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2015.2439635 · Cited by 936
Efficient and self-adaptive in-situ learning in multilayer memristor neural networks
Li, C., Belkin, D., Li, Y., Yan, P., Hu, M., Ge, N., Jiang, H., Montgomery, E., Lin, P., Wang, Z., et al. (2018) · Nature Communications · doi:10.1038/s41467-018-04484-2 · Cited by 931
Choi, S., Tan, S. H., Li, Z., Kim, Y., Choi, C., Chen, P.-Y., Yeon, H., Yu, S., & Kim, J. (2018) · Nature Materials · doi:10.1038/s41563-017-0001-5 · Cited by 690
Self-citationChen, P.-Y., Peng, X., & Yu, S. (2018) · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · doi:10.1109/tcad.2018.2789723 · Cited by 670
Self-citationFerroelectric FET analog synapse for acceleration of deep neural network training
Jerry, M., Chen, P.-Y., Zhang, J., Sharma, P., Ni, K., Yu, S., & Datta, S. (2017) · 2017 IEEE International Electron Devices Meeting (IEDM) · doi:10.1109/iedm.2017.8268338 · Cited by 599
Self-citationMemristor Crossbar-Based Neuromorphic Computing System: A Case Study
Hu, M., Li, H. H., Chen, Y., Wu, Q., Rose, G. S., & Linderman, R. (2014) · IEEE Transactions on Neural Networks and Learning Systems · doi:10.1109/tnnls.2013.2296777 · Cited by 414
Training and Inference with Integers in Deep Neural NetworksPreprint
Wu, S., Li, G., Chen, F., & Shi, L. (2018) · arXiv (Cornell University) · doi:10.48550/arxiv.1802.04680 · Cited by 390
UNPU: An Energy-Efficient Deep Neural Network Accelerator With Fully Variable Weight Bit Precision
Lee, J., Kim, C., Kang, S., Shin, D., Kim, S., & Yoo, H.-J. (2019) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2018.2865489 · Cited by 335
Oh, S., Kim, T., Kwak, M., Song, J., Woo, J., Jeon, S., Yoo, I. K., & Hwang, H. (2017) · IEEE Electron Device Letters · doi:10.1109/led.2017.2698083 · Cited by 277
XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks
Sun, X., Yin, S., Peng, X., Liu, R., Seo, J.-S., & Yu, S. (2018) · 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) · doi:10.23919/date.2018.8342235 · Cited by 246 · cited 1×
“The prior work [23] has shown near-software inference accuracy on the binary neural network, however it is known that the weight precision requirement of online training is higher than that of inference.”
BackgroundSelf-citationTaO x -based resistive switching memories: prospective and challenges
Prakash, A., Jana, D., & Maikap, S. (2013) · Nanoscale Research Letters · doi:10.1186/1556-276x-8-418 · Cited by 224
Visual Pattern Extraction Using Energy-Efficient “2-PCM Synapse” Neuromorphic Architecture
Bichler, O., Suri, M., Querlioz, D., Vuillaume, D., de Salvo, B., & Gamrat, C. (2012) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2012.2197951 · Cited by 213
Resistive memory device requirements for a neural algorithm accelerator
Agarwal, S., Plimpton, S. J., Hughart, D. R., Hsia, A. H., Richter, I., Cox, J. A., James, C. D., & Marinella, M. J. (2016) · 2016 International Joint Conference on Neural Networks (IJCNN) · doi:10.1109/ijcnn.2016.7727298 · Cited by 213
A Methodology to Improve Linearity of Analog RRAM for Neuromorphic Computing
Wu, W., Wu, H., Gao, B., Yao, P., Zhang, X., Peng, X., Yu, S., & Qian, H. (2018) · 2018 IEEE Symposium on VLSI Technology · doi:10.1109/vlsit.2018.8510690 · Cited by 197
Self-citationA 42pJ/decision 3.12TOPS/W robust in-memory machine learning classifier with on-chip training
Gonugondla, S. K., Kang, M., & Shanbhag, N. R. (2018) · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · doi:10.1109/isscc.2018.8310398 · Cited by 195
Wang, I., Chang, C.-C., Chiu, L.-W., Chou, T., & Hou, T. (2016) · Nanotechnology · doi:10.1088/0957-4484/27/36/365204 · Cited by 187
Fully parallel write/read in resistive synaptic array for accelerating on-chip learning
Gao, L., Wang, I., Chen, P.-Y., Vrudhula, S. B. K., Seo, J.-S., Cao, Y. K., Hou, T., & Yu, S. (2015) · Nanotechnology · doi:10.1088/0957-4484/26/45/455204 · Cited by 144
Self-citationResistive Memory-Based Analog Synapse: The Pursuit for Linear and Symmetric Weight Update
Woo, J., & Yu, S. (2018) · IEEE Nanotechnology Magazine · doi:10.1109/mnano.2018.2844902 · Cited by 138
Self-citationImprovement of data retention in HfO2/Hf 1T1R RRAM cell under low operating current
Chen, Y. Y., Komura, M., Degraeve, R., Govoreanu, B., Goux, L., Fantini, A., Raghavan, N., Clima, S., Zhang, L., Belmonte, A., et al. (2013) · Technical digest - International Electron Devices Meeting/Technical digest · doi:10.1109/iedm.2013.6724598 · Cited by 103
Sun, X., Wang, P., Ni, K., Datta, S., & Yu, S. (2018) · Technical digest - International Electron Devices Meeting/Technical digest · doi:10.1109/iedm.2018.8614611 · Cited by 103
Self-citationProgramming Protocol Optimization for Analog Weight Tuning in Resistive Memories
Gao, L., Chen, P.-Y., & Yu, S. (2015) · IEEE Electron Device Letters · doi:10.1109/led.2015.2481819 · Cited by 101
Self-citationInvestigation of statistical retention of filamentary analog RRAM for neuromophic computing
Zhao, M., Wu, H., Gao, B., Zhang, Q., Wu, W., Wang, S., Xi, Y., Wu, D., Deng, N., Yu, S., et al. (2017) · 2017 IEEE International Electron Devices Meeting (IEDM) · doi:10.1109/iedm.2017.8268522 · Cited by 95
Self-citationZhao, M., Wu, H., Gao, B., Sun, X., Liu, Y., Yao, P., Xi, Y., Li, X., Zhang, Q., Wang, K., et al. (2018) · Technical digest - International Electron Devices Meeting/Technical digest · doi:10.1109/iedm.2018.8614664 · Cited by 72
Self-citationParallel Architecture With Resistive Crosspoint Array for Dictionary Learning Acceleration
Kadetotad, D. V., Xu, Z., Mohanty, A., Chen, P.-Y., Lin, B., Ye, J., Vrudhula, S. B. K., Yu, S., Cao, Y. K., & Seo, J.-S. (2015) · IEEE Journal on Emerging and Selected Topics in Circuits and Systems · doi:10.1109/jetcas.2015.2426495 · Cited by 63
Self-citationImprovement of data retention in HfO2 / Hf 1T1R RRAM cell under low operating current
Chen, Y. Y., Komura, M., Degraeve, R., Govoreanu, B., Goux, L., Fantini, A., Raghavan, N., Clima, S., Zhang, L., Belmonte, A., et al. (2013) · Cited by 55
Reliability perspective of resistive synaptic devices on the neuromorphic system performance
Chen, P.-Y., & Yu, S. (2018) · IEEE International Reliability Physics Symposium proceedings · doi:10.1109/irps.2018.8353615 · Cited by 48
Self-citationZhang, B., Chen, L.-Y., & Verma, N. (2019) · IEEE International Conference on Acoustics Speech and Signal Processing · doi:10.1109/icassp.2019.8683521 · Cited by 24
A Model for Multilevel Phase-Change Memories Incorporating Resistance Drift Effects
Cobley, R. A., Wright, C. D., & Diosdado, J. A. V. (2014) · IEEE Journal of the Electron Devices Society · doi:10.1109/jeds.2014.2357577 · Cited by 12
Cited by
Sorted by citations
Hardware implementation of memristor-based artificial neural networks
Aguirre, F., Sebastian, A., Le Gallo, M., Song, W., Wang, T., Yang, J. J., Lu, W., Chang, M.-F., Ielmini, D., Yang, Y., et al. (2024) · Nature Communications · doi:10.1038/s41467-024-45670-9 · Cited by 564
“The same philosophy was adopted by Sun et al. 229 , placing special emphasis on the effect of the non-linear and quantized nature of the synaptic weight update.”
Compute-in-Memory Chips for Deep Learning: Recent Trends and Prospects
Yu, S., Jiang, H., Huang, S., Peng, X., & Lu, A. (2021) · IEEE Circuits and Systems Magazine · doi:10.1109/mcas.2021.3092533 · Cited by 414
Self-citationRecent Advances and Future Prospects for Memristive Materials, Devices, and Systems
Song, M., Kang, J., Zhang, X., Ji, W., Ascoli, A., Messaris, I., Demirkol, A. Ş., Dong, B., Aggarwal, S., Wan, W., et al. (2023) · ACS Nano · doi:10.1021/acsnano.3c03505 · Cited by 324
RRAM for Compute-in-Memory: From Inference to Training
Yu, S., Shim, W., Peng, X., & Luo, Y. (2021) · IEEE Transactions on Circuits and Systems I Regular Papers · doi:10.1109/tcsi.2021.3072200 · Cited by 149
Self-citationChakraborty, I., Ali, M., Ankit, A., Jain, S., Roy, S., Sridharan, S., Agrawal, A., Raghunathan, A., & Roy, K. (2020) · Proceedings of the IEEE · doi:10.1109/jproc.2020.3003007 · Cited by 140
Metadata
- Authors
- Sun, X., & Yu, S.
- Affiliations
- Georgia Institute of Technology (US)
- Venue
- IEEE Journal on Emerging and Selected Topics in Circuits and Systems
- Published
- 2019-09
- Volume
- 9
- Issue
- 3
- Pages
- 570-579
- ISSN
- 2156-3357 (ISSN-L)
- 2156-3365
- OpenAlex
- W2966199719
- Cited by
- 170
- References
- 40
- Citations by year
- 2026: 9 · 2025: 25 · 2024: 34 · 2023: 31 · 2022: 25 · 2021: 22 · 2020: 22 · 2019: 2
- FWCI
- 6.38
- Type
- journal article
- Language
- en
- Open access
- closed
- Licence
- Locations
- IEEE Journal on Emerging and Selected Topics in Circuits and Systems (publishedVersion)
- Funders
- National Science Foundation (CCF-1903951)
- Defense Advanced Research Projects Agency
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
- Physical Sciences › Computer Science › Computer Vision and Pattern Recognition › Advanced Neural Network Applications
- Keywords
- non-volatile memory, convolutional neural networks, device-to-device variation, cycle-to-cycle variation, endurance, retention, conductance drift, training accuracy, inference accuracy
About these checks
Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
Statistics and arithmetic are recomputed, not judged.
Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.
What counts as a claim ›How we measure confidence ›How we check this ›
Are you an author, or do you see a problem with this page? Request a review