Yu, Shimeng

Metal–Oxide RRAM

Wong, H.-S. P., Lee, H.-Y., Yu, S., Chen, Y.-S., Wu, Y., Chen, P.-S., Lee, B., Chen, F. T., & Tsai, M.-J. (2012) · Proceedings of the IEEE

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 2,757

Neuro-Inspired Computing With Emerging Nonvolatile Memorys

Yu, S. (2018) · Proceedings of the IEEE

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 1,170

Neuro-inspired computing chips

Zhang, W., Gao, B., Tang, J., Yao, P., Yu, S., Chang, M.-F., Yoo, H.-J., Qian, H., & Wu, H. (2020) · Nature Electronics

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 892

An Electronic Synapse Device Based on Metal Oxide Resistive Switching Memory for Neuromorphic Computation

Yu, S., Wu, Y., Jeyasingh, R., Kuzum, D., & Wong, H.-S. P. (2011) · IEEE Transactions on Electron Devices

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 805

SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations

Choi, S., Tan, S. H., Li, Z., Kim, Y., Choi, C., Chen, P.-Y., Yeon, H., Yu, S., & Kim, J. (2018) · Nature Materials

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 690

Ferroelectric FET analog synapse for acceleration of deep neural network training

Jerry, M., Chen, P.-Y., Zhang, J., Sharma, P., Ni, K., Yu, S., & Datta, S. (2017) · 2017 IEEE International Electron Devices Meeting (IEDM)

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 599

On the Switching Parameter Variation of Metal-Oxide RRAM—Part I: Physical Modeling and Simulation Methodology

Guan, X., Yu, S., & Wong, H.-S. P. (2012) · IEEE Transactions on Electron Devices

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 355

Overcoming the challenges of crossbar resistive memory architectures

Xu, C., Niu, D., Muralimanohar, N., Balasubramonian, R., Zhang, T., Yu, S., & Xie, Y. (2015) · 2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)

Advanced Memory and Neural ComputingParallel Computing and Optimization Techniques

Cited by 340

DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-Chip Training

Peng, X., Huang, S., Jiang, H., Lu, A., & Yu, S. (2021) · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 317

Improving Analog Switching in HfO x -Based Resistive Memory With a Thermal Enhanced Layer

Wu, W., Wu, H., Gao, B., Deng, N., Yu, S., & Qian, H. (2017) · IEEE Electron Device Letters

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 282

A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors

Khwa, W.-S., Chen, J.-J., Li, J.-F., Si, X., Yang, E.-Y., Sun, X., Liu, R., Chen, P.-Y., Li, Q., Yu, S., et al. (2018) · 2018 IEEE International Solid - State Circuits Conference - (ISSCC)

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 260

XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks

Sun, X., Yin, S., Peng, X., Liu, R., Seo, J.-S., & Yu, S. (2018) · 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 246

Binary neural network with 16 Mb RRAM macro chip for classification and online training

Yu, S., Li, Z., Chen, P.-Y., Wu, H., Gao, B., Wang, D., Wu, W., & Qian, H. (2016) · 2016 IEEE International Electron Devices Meeting (IEDM)

Advanced Memory and Neural ComputingAdvanced Neural Network Applications

Cited by 219

A neuromorphic visual system using RRAM synaptic devices with Sub-pJ energy and tolerance to variability: Experimental characterization and large-scale modeling

Yu, S., Gao, B., Fang, Z., Yu, H., Kang, J., & Wong, H.-S. P. (2012) · 2012 International Electron Devices Meeting

Advanced Memory and Neural ComputingNeural Networks and Reservoir Computing

Cited by 213

A Methodology to Improve Linearity of Analog RRAM for Neuromorphic Computing

Wu, W., Wu, H., Gao, B., Yao, P., Zhang, X., Peng, X., Yu, S., & Qian, H. (2018) · 2018 IEEE Symposium on VLSI Technology

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 197

15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips

Su, J.-W., Si, X., Chou, Y.-C., Chang, T.-W., Huang, W.-H., Tu, Y.-N., Liu, R., Lu, P.-J., Liu, T.-W., Wang, J.-H., et al. (2020) · 2020 IEEE International Solid- State Circuits Conference - (ISSCC)

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 189

Ultra-Low-Energy Three-Dimensional Oxide-Based Electronic Synapses for Implementation of Robust High-Accuracy Neuromorphic Computation Systems

Gao, B., Bi, Y., Chen, H.-Y., Liu, R., Huang, P., Chen, B., Liu, L., Liu, X., Yu, S., Wong, H.-S. P., et al. (2014) · ACS Nano

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 188

High-Throughput In-Memory Computing for Binary Deep Neural Networks With Monolithically Integrated RRAM and 90-nm CMOS

Yin, S., Sun, X., Yu, S., & Seo, J.-S. (2020) · IEEE Transactions on Electron Devices

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 171

Impact of Non-Ideal Characteristics of Resistive Synaptic Devices on Implementing Convolutional Neural Networks

Sun, X., & Yu, S. (2019) · IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 170

HfOx based vertical resistive random access memory for cost-effective 3D cross-point architecture without cell selector

Chen, H.-Y., Yu, S., Gao, B., Huang, P., Kang, J., & Wong, H.-S. P. (2012) · 2012 International Electron Devices Meeting

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 144

Three-Dimensional nand Flash for Vector–Matrix Multiplication

Wang, P., Xu, F., Wang, B., Gao, B., Wu, H., Qian, H., & Yu, S. (2019) · IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 132

Experimental Characterization of Physical Unclonable Function Based on 1 kb Resistive Random Access Memory Arrays

Liu, R., Wu, H., Pang, Y., Qian, H., & Yu, S. (2015) · IEEE Electron Device Letters

Physical Unclonable Functions (PUFs) and Hardware SecurityAdvanced Memory and Neural Computing

Cited by 132

Investigation of statistical retention of filamentary analog RRAM for neuromophic computing

Zhao, M., Wu, H., Gao, B., Zhang, Q., Wu, W., Wang, S., Xi, Y., Wu, D., Deng, N., Yu, S., et al. (2017) · 2017 IEEE International Electron Devices Meeting (IEDM)

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 95

A 40-nm MLC-RRAM Compute-in-Memory Macro With Sparsity Control, On-Chip Write-Verify, and Temperature-Independent ADC References

Li, W., Sun, X., Huang, S., Jiang, H., & Yu, S. (2022) · IEEE Journal of Solid-State Circuits

Advanced Memory and Neural ComputingAdvanced Neural Network Applications

Cited by 77