A Survey of CPU-GPU Heterogeneous Computing Techniques

In the paper

“It provides a higher abstraction programming framework and hence, it enables the programmer to write programs which are portable across wide variety of processing units, although it may not be able to achieve the highest possible performance on a PU.”

What the sources say

• Supported

  The Introduction says OpenCL provides easy-to-use abstractions and guarantees portability and correctness across architectures. The OpenCL programming model says kernels are portable across a variety of hardware but are not guaranteed to achieve peak performance on different architectures. (LLM, conf=0.94)

  cites Stone et al. 2010 source

In the paper

“OpenCL [Stone et al. 2010] is an open standard and has been adopted by several vendors.”

What the sources say

• Supported

  The Introduction calls OpenCL a new industry standard. The Graphics Processing Units section reports that both AMD and NVIDIA had released OpenCL implementations, supporting adoption by multiple vendors. (LLM, conf=0.93)

  cites Stone et al. 2010 source

In the paper

“Earlier GPUs only provided softwaremanaged caches and not hardware-managed caches, however, as the GPUs move towards general-purpose computing, they are now featuring increasingly larger-sized hardware-managed caches.”

What the sources say

• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites Mittal 2014a

In the paper

“For example, GT200 architecture GPU did not have an L2 cache, the Fermi GPU has 768KB LLC, the Kepler GPU has 1536KB LLC and the Maxwell GPU has 2048KB LLC [Mittal 2014a].”

What the sources say

• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites Mittal 2014a

In the paper

“The 45nm POWER7 processor had 32MB eDRAM (embedded DRAM) LLC [Wendel et al. 2010], the 32nm POWER7+ processor had an 80MB eDRAM LLC [Zyuban et al. 2013], while the 22nm POWER8 processor has a 96MB eDRAM LLC [Fluhr et al. 2014].”

What the sources say

• ?Not checked — no full text of the sourcecites Wendel et al. 2010 source
• ?Not checked — no full text of the sourcecites Zyuban et al. 2013 source
• ?Not checked — no full text of the sourcecites Fluhr et al. 2014 source

In the paper

“Few years ago, CPUs had nearly 1B transistors [Wendel et al. 2010] while the recently announced Oracle SPARC M7 CPU will have more than 10B transistors on chip [Morgan 2014].”

What the sources say

• ?Not checked — no full text of the sourcecites Wendel et al. 2010 source
• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites Morgan 2014

In the paper

“From Table III, it is clear that for GPU programming, CUDA is most widely used, which is due to its similarity with C/C++ and ability to write optimized code.”

In the paper

“3D stacking facilitates high bandwidth and memory capacity [Poremba et al. 2015] and hence, both CPUs and GPUs are increasingly moving towards use of 3D stacking, for example, Intel's Knights Landing [Gardner 2014] and NVIDIA's Pascal GPU [Gupta 2014] will feature 3D stacked memory.”

What the sources say

• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites Gardner 2014
• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites Gupta 2014

In the paper

“An even closer level of integration between CPU and GPU can be achieved by fabricating them on the same chip and many such processors have already been produced, such as AMD Llano [Branover et al. 2012], Intel Sandy Bridge [Yuffe et al. 2011], Ivy Bridge [Damaraju et al. 2012] etc.”

What the sources say

• ?Not checked — no full text of the sourcecites Branover et al. 2012 source
• ?Not checked — no full text of the sourcecites Yuffe et al. 2011 source
• ?Not checked — no full text of the sourcecites Damaraju et al. 2012 source

In the paper

“Earlier CPUs had only one or two cores, while as recent CPUs have 8 to 32 cores [Fluhr et al. 2014;Morgan 2014] and CPUs with more than 60 cores are likely to be available in near future [Gardner 2014].”

What the sources say

• ?Not checked — no full text of the sourcecites Fluhr et al. 2014 source
• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites Morgan 2014
• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites Gardner 2014

In the paper

“For CPU programming, OpenMP is most widely used due to its portability and ease of programming by virtue of use of compiler directives.”

In the paper

“Similarly, the GT200 GPU (2008) had 1.4B transistors, while the recent Geforce GTX TITAN X GPU has 8B transistors [Pirzada 2015].”

What the sources say

• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites Pirzada 2015

In the paper

“Along similar lines, the number of CUDA cores in GeForce GTX 280, GTX 480, GTX 680 and GTX TITAN X GPU is 240, 448, 1536 and3072, respectively [NVIDIA 2015].”

What the sources say

• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites NVIDIA 2015

In the paper

“In contrast, GPUs use much larger number of cores, which are in-order cores that share their control unit.Also, GPU cores use lower frequency, and smaller sized caches [Mittal 2014a].”

What the sources say

• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites Mittal 2014a

In the paper

“While fused HCSs address several limitations of discrete HCSs, they also introduce new tradeoffs and require the design of suitable data-access strategies to take full advantage of their fast interconnection.”

In the paper

“As both CPU and GPU become employed in a wide range of applications, it has been acknowledged that both of these processing units (PUs) have their unique features and strengths and hence, CPU-GPU collaboration is inevitable to achieve high-performance computing.”

In the paper

“Many algorithm-level techniques require the programmer to manually partition the workload between PUs, identify the subtasks suitable for each PU and/or profile the performance of each PU.This is a tedious process which does not scale well beyond small problems.”

In the paper

“This reduces their data transfer time which especially benefits the applications which require large communication between CPU and GPU.”

In the paper

“In systems with GPUs, CPUs have been conventionally used as host for GPU to manage I/O and scheduling, however, as continuing innovations improve CPU performance even further (refer Section 2.2), using their computation capabilities also has become more attractive.”

In the paper

“Moreover, existing fused HCSs are not strictly superior to discrete GPUs on all parameters and hence, despite their potential, extensive evaluation and development on them has been lacking.”

In the paper

“As both CPU and GPU become employed in a wide range of applications, it has been acknowledged that both of these processing units (PUs) have their unique features and strengths and hence, CPU-GPU collaboration is inevitable to achieve high-performance computing.”

In the paper

“To meet the worse-case performance requirements, the CPU-only or GPU-only systems are usually over-provisioned, however, their average utilization remains low [Mittal 2012;Mittal and Vetter 2015].”

What the sources say

• ?Not checked — no full text of the sourcecites Mittal 2012 source
• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites Mittal and Vetter 2015

In the paper

“Due to their unique characteristics, HCSs require special benchmarks to gain insights into their functioning.”

In the paper

“Further, while several initial works report that GPUs provide up to 100× to 1000× speedup, other researchers claim that on applying careful optimizations on both CPUs and GPUs; CPUs may equal or even outperform the performance of GPUs [Gummaraju et al. 2010;Lee et al. 2010].”

What the sources say

• ?Not checked — no full text of the sourcecites Gummaraju et al. 2010 source
• ?Not checked — no full text of the sourcecites Lee et al. 2010 source

In the paper

“The vastly different architectures and programming models of CPU and GPU, however, also present several challenges in achieving such collaborative computing.”

In the paper

“Mobile computing systems, which now number nearly equal to the population of the earth [International Telecommunication Union 2012], generally provide multimedia services under real-time performance constraints and hence they are attractive targets for acceleration through the use of heterogeneous computing.”

What the sources say

• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites International Telecommunication Union 2012

In the paper

“For applications where data transfers dominate execution time, or branch divergence does not allow for the uninterrupted execution on all GPU cores, CPUs can provide better performance than GPUs.”

In the paper

“The vastly different architecture, programming model and performance (for a given program) of CPU and GPU present unique challenges in heterogeneous computing.”

In the paper

“For example, Ding et al. [2009] note that for a query processing application, CPUs are more efficient for queries involving short lists while GPUs are more efficient for those involving long lists.”

What the sources say

• ?Not checked — no full text of the sourcecites Ding et al. 2009 source

In the paper

“Significant amount of work needs to be done before recently introduced HCS programming frameworks can reach the level of maturity, robustness and popularity as enjoyed by the conventional CPU programming languages.”

In the paper

“As a result, heterogeneous computing has been actively researched and utilized in variety of applications ranging from natural sciences to engineering etc.”

In the paper

“Several existing large-scale codes are written in either CPU or GPU languages.Porting them to HCSs will incur large overhead and is also error-prone.”

In the paper

“However, given that CPU-GPU workload division based techniques on heterogeneous systems use CPU also to get performance gain (and not just as a host), sometimes CPU is also referred to as an accelerator [Sun et al. 2012].”

What the sources say

• ?Not checked — no full text of the sourcecites Sun et al. 2012 source

In the paper

“However, a recently proposed interconnect, called NVLink, promises to offer 5 to 12× bandwidth compared to PCIe Gen3 interconnect [Gupta 2014] and this is likely to offset the bandwidth limitation of conventional interconnects.”

What the sources say

• ?Not matched

  Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  cites Gupta 2014

In the paper

“These domains are, by no means, exhaustive as heterogeneous computing can be applied in several other domains also which are computationally intensive and/or provide opportunity for parallelization.”

In the paper

“Discrete GPUs have separate memory spaces from the CPU and hence, data transfer happens over a connection bus (e.g.PCIe bus), which incurs large overhead.”

In the paper

“Note that while many other techniques which aim to improve performance may also save energy, in this table we only show those techniques which have been evaluated on the basis of energy efficiency.”

In the paper

“Notice that some of these benchmarks provide implementations in different languages which allow comparison using those programming models.”

In the paper

“While the large cost and power consumption of HCSs may be acceptable in high-end computing systems, using them in mobile systems calls for an order-of-magnitude improvement in their energy efficiency.”

In the paper

“In recent years, CPUs and GPUs are increasingly being seen as indispensable coprocessors, instead of substitutes for each other.”