The DOI matches its Crossref record, with a small difference in title or year; 24 of the 26 references it cites were found in a registry or an index.
$\mu $ RNG: A 300–950 mV, 323 Gbps/W All-Digital Full-Entropy True Random Number Generator in 14 nm FinFET CMOS
Abstract
This paper describes μRNG, an ultra-lightweight all-digital full-entropy true-random number generator (TRNG), fabricated in 14 nm high-k/metal-gate FinFET CMOS, targeted for on-die generation of cryptographic keys in energy-constrained IoT and wearable platforms. The μRNG combines the entropy of multiple independent sources to generate an output bitstream that is indistinguishable from an ideal unbiased entropy source. Three independent self-calibrating all-digital entropy sources, coupled with XOR feedback shift-register based correlation suppressors and an in-line compact Barak-Impagliazzo- Wigderson (BIW) extractor enable ultra-low energy consumption of 3 pJ/full-entropy bit with a dense layout occupying 1008 μm2, while achieving: (i) 162.5 Mbps full-entropy throughput at 1.3 GHz operation, with total power consumption of 1.5 mW and leakage power component of 90 μW, measured at 0.75 V, 25°C, (ii) mutually uncorrelated raw bitstreams from the three entropy sources with phi-coefficient cross-correlation∞> 0.99, (iv) hysteresis-free extracted output for lags 1-1000, with ACF ~0 within 95% confidence bounds of a Gaussian distribution (μ = 0, σ2= 0.002), (v) wide operating supply voltage range of 300-950 mV with throughput scaling to 225 Mbps at 950 mV and robust subthreshold voltage performance of 400 Kbps, 4 μW, measured at 300 mV, 25°C, (vi) peak energy-efficiency of 323 Gbps/W at near-threshold voltage of 400 mV, with full-entropy throughput of 8.6 Mbps, total power consumption of 27 μW, (vii) 6.5× reduction in gate count and 5.4× lower energy consumption compared to conventional AES-based entropy extractors.
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“Subsequently, Intel improved this TRNG using in-line decorrelators and a lightweight BIW extractor.It demonstrated that this TRNG could provide a throughput of 162.5 Mbps at 1.3 GHz operation, with 1.5 mW total power consumption and a 90 µW leakage component [11].”
From True Random Number Generators Using Electrical Noise (2019) · cites this paper as [11]
Citations
Cites
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Self-citationNew Methods for Digital Generation and Postprocessing of Random Data
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High-Speed True Random Number Generation with Logic Gates Only
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Physical random number generator based on MOS structure after soft breakdown
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An oscillator-based true random number generator with process and temperature tolerance
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Flagged first, then by citations
2 of the 26 references couldn’t be matched to a known paper.
Research works printed but not linked: 9
- fujita, 2004, Si nanodevices for RNG circuits for cryptographic security, IEEE ISSCC Dig, 294
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- mathew, 2015, $\mu $ RNG: A 300-950 mV 323 Gbps/W all-digital fullentropy TRNG in 14 nm FinFET CMOS, Proc ESSCIRC, 116
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Integer factorization using stochastic magnetic tunnel junctions
Borders, W. A., Pervaiz, A. Z., Fukami, S., Camsari, K. Y., Ohno, H., & Datta, S. (2019) · Nature · doi:10.1038/s41586-019-1557-9 · Cited by 637
An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools
Hu, W., Chang, C.-H., Sengupta, A., Bhunia, S., Kastner, R., & Li, H. H. (2020) · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · doi:10.1109/tcad.2020.3047976 · Cited by 236
Satpathy, S. K., Mathew, S. K., Kumar, R., Suresh, V., Anders, M. A., Kaul, H., Agarwal, A., Hsu, S., Krishnamurthy, R. K., & De, V. (2019) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2018.2886350 · Cited by 114
Self-citationTrends in Hardware Security: From Basics to ASICs
Alioto, M. (2019) · IEEE Solid-State Circuits Magazine · doi:10.1109/mssc.2019.2923503 · Cited by 114
Metadata
- Authors
- Mathew, S. K., Johnston, D., Satpathy, S., Suresh, V., Newman, P., Anders, M. A., Kaul, H., Agarwal, A., Hsu, S. K., Chen, G., & Krishnamurthy, R. K.
- Affiliations
- Intel (United States) (US)
- ORCID
- Venue
- IEEE Journal of Solid-State Circuits
- Published
- 2016-07
- Volume
- 51
- Issue
- 7
- Pages
- 1695-1704
- ISSN
- 0018-9200 (ISSN-L)
- 1558-173X
- OpenAlex
- W2401371495
- Cited by
- 102
- References
- 26
- Citations by year
- 2026: 5 · 2025: 10 · 2024: 12 · 2023: 9 · 2022: 15 · 2021: 14 · 2020: 14 · 2019: 13 · 2018: 7 · 2017: 3
- FWCI
- 11.62
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- IEEE Journal of Solid-State Circuits (publishedVersion)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Physical Sciences › Computer Science › Artificial Intelligence › Cryptographic Implementations and Security
- Keywords
- true random number generator, low-power electronics, near-threshold operation, subthreshold operation, wide supply voltage range, energy efficiency, cryptographic key generation, Internet of Things, wearable devices, 14nm FinFET
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