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Cited by 81Analog and Mixed-Signal Circuit DesignNeuroscience and Neural EngineeringRadio Frequency Integrated Circuit Design

A Compact, Low Input Capacitance Neural Recording Amplifier

Ng, K. A., Yong Ping Xu·2013·IEEE Transactions on Biomedical Circuits and Systems
DOI 10.1109/tbcas.2013.2280066
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Abstract

Conventional capacitively coupled neural recording amplifiers often present a large input load capacitance to the neural signal source and hence take up large circuit area. They suffer due to the unavoidable trade-off between the input capacitance and chip area versus the amplifier gain. In this work, this trade-off is relaxed by replacing the single feedback capacitor with a clamped T-capacitor network. With this simple modification, the proposed amplifier can achieve the same mid-band gain with less input capacitance, resulting in a higher input impedance and a smaller silicon area. Prototype neural recording amplifiers based on this proposal were fabricated in 0.35 μm CMOS, and their performance is reported. The amplifiers occupy smaller area and have lower input loading capacitance compared to conventional neural amplifiers. One of the proposed amplifiers occupies merely 0.056 mm(2). It achieves 38.1-dB mid-band gain with 1.6 pF input capacitance, and hence has an effective feedback capacitance of 20 fF. Consuming 6 μW, it has an input referred noise of 13.3 μVrms over 8.5 kHz bandwidth and NEF of 7.87. In-vivo recordings from animal experiments are also demonstrated.

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Crossref · 10.1109/tbcas.2013.2280066

Cites

28 of 28 references verified0 citation errors · 0 not checkable

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  • Modern circuit designs and IC fabrication technologies have produced innovative designs that allow designers to relax the size-functionality compromises.

    “However, modern circuit designs [77, 92] and IC fabrication technologies [18, 86] have resulted in innovative designs, enabling designers to relax such compromises.”

    From Implantable neurotechnologies: a review of integrated circuit neural amplifiers (2016) · cites this paper as [92]

  • Although input transistor gate areas are usually large to reduce flicker noise, that reduction is counteracted by an increased capacitance multiplying effect from the parasitic gate area.

    “Although the gate areas of the input transistors are usually large to reduce the flicker noise component, the flicker noise reduction is contradicted by the increased capacitance multiplying effect contributed by the parasitic gate area [92].”

    From Implantable neurotechnologies: a review of integrated circuit neural amplifiers (2016) · cites this paper as [92]

  • The gate area optimization technique proposed by Ng and Xu must be used to reduce input-referred noise from flicker noise and the capacitor transformer effect for complementary input pairs.

    “Thus, the gate area optimization technique proposed by Ng and Xu [92] must be used to reduce the input-referred noise due to flicker noise and capacitor transformer effect for the complimentary input pairs.”

    From Implantable neurotechnologies: a review of integrated circuit neural amplifiers (2016) · cites this paper as [92]

  • The gate areas of the input differential pair must be appropriately sized according to the method described by Ng and Xu.

    “Hence, the gate areas of the input differential pair must be appropriately sized according to the method described by Ng and Xu [92].”

    From Implantable neurotechnologies: a review of integrated circuit neural amplifiers (2016) · cites this paper as [92]

  • Ng and Xu proposed relaxing the area-gain trade-off by introducing additional shunt elements onto the negative feedback network.

    “However, Ng and Xu proposed relaxing this area–gain trade-off by introducing additional shunt elements onto the negative feedback network [92].”

    From Implantable neurotechnologies: a review of integrated circuit neural amplifiers (2016) · cites this paper as [92]

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Authors
Ng, K. A., & Xu, Y. P.
Affiliations
National University of Singapore (SG)
ORCID
Venue
IEEE Transactions on Biomedical Circuits and Systems
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Published
2013-10
Volume
7
Issue
5
Pages
610-620
ISSN
  • 1932-4545 (ISSN-L)
  • 1940-9990
DOI
10.1109/tbcas.2013.2280066
OpenAlex
W2047700412
Cited by
81
References
28
Citations by year
2026: 3 · 2025: 3 · 2024: 5 · 2023: 4 · 2022: 5 · 2021: 13 · 2020: 9 · 2019: 6 · 2018: 8 · 2017: 6 · 2016: 4 · 2015: 8 · 2014: 7
FWCI
3.49
Type
journal article
Language
en
Open access
closed
Licence
ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html (vor)
Locations
  • IEEE Transactions on Biomedical Circuits and Systems (publishedVersion)
  • PubMed (publishedVersion)
  • National University of Singapore (submittedVersion)
Topics
  • Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
  • Life Sciences › Neuroscience › Cellular and Molecular Neuroscience › Neuroscience and Neural Engineering
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
Keywords
input capacitance, feedback capacitor, input impedance, chip area reduction, CMOS integrated circuit, low-power amplifier, input-referred noise, in vivo neural recording, compact amplifier design
MeSH terms
Amplifiers, Electronic, Animals, Equipment Design, Neurons, Signal Processing, Computer-Assisted, Rats, Wistar, Equipment Failure Analysis, Electric Capacitance, Rats

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