Analysis and Design of Tunable Amplifiers for Implantable Neural Recording Applications
Abstract
In this paper, an in-depth design methodology for fully-integrated tunable low-noise amplifiers for neural recording applications is presented. In this methodology, a modified system design is proposed to optimize the area/noise/linearity performance. A novel linear pseudo-resistor with a wide range of tunability is also proposed. As a case study, a low-noise tunable and reconfigurable amplifier for neural recording applications is designed and simulated in a 0.18$\mu{\rm m}$complementary metal–oxide–semiconductor process in all process corners. Simulated characteristics of the amplifier include tunable gain of 54 dB, tunable high-cutoff frequency of 10 kHz, programmable low-cutoff frequency ranging from 4 to 300 Hz, and power consumption of 20.8$\mu{\rm W}$at 1.8 V. According to postlayout simulations, integrated input-referred noise of the amplifier is 2.6$\mu{\rm V}_{\rm rms}$and 2.38$\mu{\rm V}_{\rm rms}$over the 0.5 Hz–50 kHz frequency range for low-cutoff frequency of 4 and 300 Hz, respectively. The amplifier also provides output voltage swing of 1${\rm V}_{\rm P-P}$with total harmonic distortion of -46.24 dB at 300 Hz, and -45.97 dB at 10 kHz.
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Pseudo-resistor transistor structures can be divided into non-tunable (constant) and tunable topologies, which can themselves be classified as voltage- or current-controlled structures.
“These can be divided into non-tunable (constant) and tunable topologies, which can themselves be classified as voltage- or current-controlled structures [186].”
From Active Neural Interface Circuits and Systems for Selective Control of Peripheral Nerves: A Review (2024) · cites this paper as [186]
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CMOS Tunable Pseudo-Resistor with Low Harmonic Distortion
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- Authors
- Rezaee-Dehsorkh, H., Ravanshad, N., Lotfi, R., Mafinezhad, K., & Sodagar, A. M.
- Affiliations
- Ferdowsi University of Mashhad (IR)
- K. N. Toosi University of Technology (IR)
- Venue
- IEEE Journal on Emerging and Selected Topics in Circuits and Systems
- Published
- 2011-12
- Volume
- 1
- Issue
- 4
- Pages
- 546-556
- ISSN
- 2156-3357 (ISSN-L)
- 2156-3365
- OpenAlex
- W2013662327
- Cited by
- 103
- References
- 23
- Citations by year
- 2026: 3 · 2025: 6 · 2024: 6 · 2023: 10 · 2022: 4 · 2021: 12 · 2020: 14 · 2019: 9 · 2018: 6 · 2017: 9 · 2016: 9 · 2015: 4 · 2014: 6 · 2013: 2 · 2012: 3
- FWCI
- 2.08
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- IEEE Journal on Emerging and Selected Topics in Circuits and Systems (publishedVersion)
- Topics
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Keywords
- neural recording, implantable neural interfaces, reconfigurable amplifier, input-referred noise, linearity, CMOS integrated circuit, 0.18 μm CMOS
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