Cited by 145Analog and Mixed-Signal Circuit DesignRadio Frequency Integrated Circuit DesignNeuroscience and Neural Engineering

A Micropower Low-Noise Neural Recording Front-End Circuit for Epileptic Seizure Detection

Qian, Chengliang, Parramon, Jordi, Sanchez-Sinencio, Edgar·2011·IEEE Journal of Solid-State Circuits

Abstract

This paper describes a micropower low-noise neural front-end circuit capable of recording epileptic fast ripples (FR). The front-end circuit consisting of a preamplifier followed by a 6th-order bandpass filter is designed for signal sensing in a future epileptic deep brain stimulator. A current-splitting technique is combined with an output-branch current scaling technique in a folded-cascode amplifier structure to improve the noise and power tradeoff in the preamplifier. In measurements, the preamplifier exhibits 39.4 dB DC gain, 0.36 Hz to 1.3 kHz of -3 dB bandwidth, and 3.07 μVrmstotal input-referred noise while consuming 2.4 μW from a 2.8 V power supply provided by an on-chip regulator circuit. A noise efficiency factor (NEF) of 3.09 is achieved with minimal power consumption and is one of the lowest published to date. The 6th-order follow-the-leader feedback elliptic bandpass filter passes FR signals and provides -110 dB/decade attenuation to out-of-band frequency components. In measurements, the entire front-end circuit achieves a mid-band gain of 38.5 dB, a bandwidth from 250 to 486 Hz, and a total input-referred noise of 2.48 μVrmswhile consuming 4.5 μW from the 2.8 V power supply. The front-end NEF achieved is 7.6. To the authors' knowledge, the proposed epileptic seizure- detection system is the first to achieve the FR-recording functionality. The chip is fabricated in a standard 0.6 μm CMOS process. Die size is 0.45 mm2.

Integrity signals

Registry

Crossref · 10.1109/jssc.2011.2126370

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36 of 36 references verified0 citation errors · 0 not checkable

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  • Wattanapanitch et al. proposed an NEF optimization scheme for low-voltage neural amplifiers using the folded cascode OTA, which was adopted in later studies.

    “Wattanapanitch et al. [142] further proposed an NEF optimization scheme for low-voltage neural amplifiers implemented using the folded cascode OTA, which were adopted in later studies [103, 141].”
  • The folded cascode OTA is the natural choice for front-end amplifiers operating below 3 V and requiring low NEF and PEF values.

    “Instead, the folded cascode OTA (Fig. 5d) is the natural choice for front-end amplifiers operating at supply voltages below 3 V and requiring low NEF and PEF values [103, 141, 142].”

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Authors
Qian, C., Parramon, J., & Sanchez-Sinencio, E.
Affiliations
  • Texas A&M University (US)
  • Boston Scientific (United States) (US)
Venue
IEEE Journal of Solid-State Circuits
Published
2011-06
Volume
46
Issue
6
Pages
1392-1405
ISSN
  • 0018-9200 (ISSN-L)
  • 1558-173X
OpenAlex
W2136213861
Cited by
145
References
36
Citations by year
2026: 1 · 2025: 5 · 2024: 4 · 2023: 7 · 2022: 8 · 2021: 8 · 2020: 16 · 2019: 7 · 2018: 9 · 2017: 9 · 2016: 17 · 2015: 13 · 2014: 14 · 2013: 12 · 2012: 12
FWCI
7.76
Type
journal article
Language
en
Open access
closed
Locations
IEEE Journal of Solid-State Circuits (publishedVersion)
Funders
Boston Scientific Corporation
Topics
  • Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
  • Life Sciences › Neuroscience › Cellular and Molecular Neuroscience › Neuroscience and Neural Engineering
Keywords
seizure detection, fast ripples, folded cascode amplifier, current splitting, current scaling, noise efficiency factor, deep brain stimulator, CMOS integrated circuit

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