Cited by 32Neuroscience and Neural EngineeringAnalog and Mixed-Signal Circuit DesignCCD and CMOS Imaging Sensors

Retinal Stimulator ASIC Architecture Based on a Joint Power and Data Optical Link

Lemaire, William, Benhouria, Maher, Koua, Konin, Besrour, Marwan, Gauthier, Louis-Philippe, Martin-Hardy, Gabriel, Rossignol, Tommy, Roy, Sebastien +1 more·2021·IEEE Journal of Solid-State Circuits

Abstract

Retinal implants aim to partially restore vision to patients suffering from blindness caused by age-related macular degeneration (AMD) or retinitis pigmentosa (RP). Up until now, most prostheses were powered using an inductive link coupled with cables penetrating through the eyeball. Although they efficiently power the implant, they limit long-term reliability and cause postoperative complications. A fully wireless near-infrared power and data link entering the eye through the pupil alleviates these issues but limits the available power and causes energy supply interruptions during blinking. This article presents a retinal implant ASIC architecture optimized for optical operation despite these constraints. It contains 288 individually controlled electrode drivers, each connected to electrode pads with a pitch of 150 μm. A digital controller with a stateless communication scheme allows flexible stimulation sequences and is capable of restoring stimulation within 3 ms after an eye blink. The prototype was fabricated using a CMOS 65-nm low-power technology and occupies an area of 2.8 × 3.1 mm2with a static power consumption of 3.1 mW.

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Registry

Crossref · 10.1109/jssc.2020.3045141

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48 of 48 references verified0 citation errors · 0 not checkable

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  • Voltage controlled stimulation is the simplest and can ensure electrode potentials remain within the water window; however, variations in stimulus current with respect to the electrode load lead to uncertainty in efficacy and challenges with charge-balancing.

    “V oltage controlled stimulation is the simplest and can ensure electrode potentials remain within the water window; however, variations in stimulus current with respect to the electrode load lead to uncertainty in efficacy and challenges with charge-balancing [66].”
  • The static power taken by the biased current mirrors and the area overhead of the localised structure of current DACs can be overcome by current copying methods that copy the voltage of one phase in a storage capacitor, and steer a duplicate of the corresponding stimulation current in another.

    “The static power taken by the biased current mirrors and the area overhead of the localised structure of current DACs can be overcome by current copying methods that copy the voltage of one phase in a storage capacitor, and steer a duplicate of the corresponding stimulation current in another [44], [66], as shown in Fig. 5(c).”
  • Active charge balancing can be achieved by continuous adjustment of the source/sink currents with dynamic current copying in push-pull architectures, and by insertion of a short pulse train that instantaneously corrects the residual charge, or via compensation of the excess charge as an offset current.

    “This can be achieved by continuous adjustment of the source/sink currents with dynamic current copying in pushpull architectures, [44], [66], and by insertion of a short pulse train that instantaneously corrects the residual charge, or via compensation of the excess charge as an offset current [135], [144].”

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Authors
Lemaire, W., Benhouria, M., Koua, K., Besrour, M., Gauthier, L.-P., Martin-Hardy, G., Rossignol, T., Roy, S., & Fontaine, R.
Affiliations
Université de Sherbrooke (CA)
Venue
IEEE Journal of Solid-State Circuits
Published
2021-07
Volume
56
Issue
7
Pages
2158-2170
ISSN
  • 0018-9200 (ISSN-L)
  • 1558-173X
OpenAlex
W3119483195
Cited by
32
References
48
Citations by year
2026: 2 · 2025: 1 · 2024: 10 · 2023: 9 · 2022: 7 · 2021: 3
FWCI
3.35
Type
journal article
Language
en
Open access
closed
Locations
IEEE Journal of Solid-State Circuits (publishedVersion)
Funders
  • Natural Sciences and Engineering Research Council of Canada NSERC through Collaborative Research and Development (NSERC-CRD 530093)
  • Prompt
  • CMC Microsystems Canada
Topics
  • Life Sciences › Neuroscience › Cellular and Molecular Neuroscience › Neuroscience and Neural Engineering
  • Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › CCD and CMOS Imaging Sensors
Keywords
retinal prosthesis, ASIC architecture, blinking, low-power CMOS, age-related macular degeneration, retinitis pigmentosa, visual prosthesis

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