Cited by 307Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance DevicesPhase-change materials and chalcogenides

The DOI matches its Crossref record; 35 of the 35 references it cites were found in a registry or an index; none of the 33 sources its claims cite is checked for support yet.

Stochastic memristive devices for computing and neuromorphic applications

Open access
Gaba, Siddharth, Sheridan, Patrick, Zhou, Jiantao, Choi, Shinhyun, Lu, Wei·2013·Nanoscale

Abstract

Nanoscale resistive switching devices (memristive devices or memristors) have been studied for a number of applications ranging from non-volatile memory, logic to neuromorphic systems. However a major challenge is to address the potentially large variations in space and time in these nanoscale devices. Here we show that in metal-filament based memristive devices the switching can be fully stochastic. While individual switching events are random, the distribution and probability of switching can be well predicted and controlled. Rather than trying to force high switching probabilities using excess voltage or time, the inherent stochastic nature of resistive switching allows these binary devices to be used as building blocks for novel error-tolerant computing schemes such as stochastic computing and provides the needed "analog" feature for neuromorphic applications. To verify such potential, we demonstrated memristor-based stochastic bitstreams in both time and space domains, and show that an array of binary memristors can act as a multi-level "analog" device for neuromorphic applications.

Overview

AI snapshot

Written from the paper’s full text.

TL;DR

Memristive devices based on Ag filament formation in amorphous silicon show fully stochastic resistive switching, but the switching probability can be predicted and controlled by voltage and pulse width. This enables random bitstreams in time and space and allows a 4-device array to act as a multi-bit synapse for stochastic computing and neuromorphic applications.

Key findings

  • Wait times before switching are broadly distributed and fit a Poisson distribution with one fitting parameter τ. For applied voltages of 2.5 V, 3.5 V, and 4.5 V, τ = 340 ms, 4.7 ms, and 0.38 ms, respectively; a 2 V increase in voltage drops the characteristic time by almost three orders of magnitude.
  • Switching probability is cumulative and predictable: a 2.5 V/300 ms pulse switched the device 20 times out of 50 trials (bias ratio p = 0.4), while a 2.5 V/1000 ms pulse switched it 38 times out of 50 (p = 0.76), closely matching Eq. (2).
  • Random bitstreams were generated in the time domain, and identical pulses applied to different devices produced 20-bit random bitstreams with similar bias ratios. A 4-device array programmed in parallel produced 4-bit-wide random bitstreams and, used as a whole, represents a 2-bit weight synapse; the authors state this is the first experimental demonstration of such a concept.
  • Discrete short pulses are cumulative regardless of gap: with 2.5 V, 100 ms pulses, almost identical τ values were obtained for gaps of 10 ms and 500 ms, and the number of pulses needed to switch followed a Poisson distribution.

Methods

  • Two-terminal crossbar devices were fabricated with a 60 nm boron-doped polysilicon bottom electrode, a 35 nm amorphous silicon insulating layer, and a silver top electrode, using electron beam lithography, PECVD, liftoff, and RIE.
  • Electrical measurements used a National Instruments USB-6259 BNC data acquisition system with a DL 1211 current preamplifier and MATLAB code; parallel testing used analog switches (ADG1412) and an Atmega32u4 microcontroller.
  • Switching statistics were measured by resetting devices to the OFF state, applying constant voltages (2.5, 3.5, 4.5 V) and repeating 100 times per bias, or applying fixed pulses (e.g., 2.5 V/300 ms and 2.5 V/1000 ms for 50 attempts); array experiments used a single 2.75 V, 1000 ms pulse for parallel programming and 2 V, 100 ms pulses for individual readout.

Limitations

  • The paper states this is a proof-of-concept demonstration; large-scale implementation must address spatial variations, power, speed, endurance, and reliability, and logic applications require very high endurance with switching probability that does not degrade over time and is uniform among devices.
  • The paper states that efficient peripheral circuit design to account for endurance limits under low-voltage operation and degradation of switching probability with time remains for future studies.
  • The text makes evident that experiments were limited to single devices and a 4-device array, with small trial counts (50 or 100), and did not demonstrate large-scale arrays or long-term reliability.

Model-written summary. Check it against the paper before relying on it.

Integrity signals

Registry

Crossref · 10.1039/c3nr01176c

Cites

35 of 35 references verified0 citation errors · 0 not checkable

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Claims the paper makes

30 Own result · 17 Not checked yet · 15 Own interpretation · 8 No basis given · 3 Sources not found · 2 Own method

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  • It may state two separate claims as one. 25
  • Probably not a substantial claim. 14
32 of 32
  • The authors state this as an assumption.

    For stochastic computing multiplication via a bit-wise AND operation, the input bitstreams x and y are independent and completely uncorrelated.

    “This operation assumes that x and y are independent bitstreams that are completely uncorrelated.”
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Metadata

Authors
Gaba, S., Sheridan, P., Zhou, J., Choi, S., & Lu, W.
Affiliations
University of Michigan (US)
Corresponding author
Lu, Wei
Venue
Nanoscale
Published
2013
Volume
5
Issue
13
Pages
5872
ISSN
  • 2040-3364 (ISSN-L)
  • 2040-3372
OpenAlex
W2148267286
Cited by
307
References
35
Citations by year
2026: 14 · 2025: 23 · 2024: 14 · 2023: 22 · 2022: 24 · 2021: 28 · 2020: 32 · 2019: 30 · 2018: 27 · 2017: 29 · 2016: 19 · 2015: 25 · 2014: 16 · 2013: 3
FWCI
12.60
Type
journal article
Language
en
Open access
Locations
  • Nanoscale (publishedVersion)
  • PubMed (publishedVersion)
  • arXiv (Cornell University) (submittedVersion)
  • arXiv (Cornell University)
Topics
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
  • Physical Sciences › Materials Science › Materials Chemistry › Phase-change materials and chalcogenides
Keywords
memristors, resistive switching, stochastic switching, stochastic computing, neuromorphic computing, error-tolerant computing, memristor arrays, non-volatile memory

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