Cited by 4,311Quantum Computing Algorithms and ArchitectureQuantum Information and CryptographyQuantum-Dot Cellular Automata

Elementary gates for quantum computation

Open access
Barenco, Adriano, Bennett, Charles H., Cleve, Richard, DiVincenzo, David P., Margolus, Norman, Shor, Peter, Sleator, Tycho, Smolin, John A. +1 more·1995·Physical Review A

Abstract

We show that a set of gates that consists of all one-bit quantum gates [U(2)] and the two-bit exclusive-OR gate [that maps Boolean values (x,y) to (x,x\ensuremath{\bigoplus}y)] is universal in the sense that all unitary operations on arbitrarily many bits n [U(${2}^{\mathit{n}}$)] can be expressed as compositions of these gates. We investigate the number of the above gates required to implement other gates, such as generalized Deutsch-Toffoli gates, that apply a specific U(2) transformation to one input bit if and only if the logical and of all remaining input bits is satisfied. These gates play a central role in many proposed constructions of quantum computational networks. We derive upper and lower bounds on the exact number of elementary gates required to build up a variety of two- and three-bit quantum gates, the asymptotic number required for n-bit Deutsch-Toffoli gates, and make some observations about the number required for arbitrary n-bit unitary operations.

Verified 2026-10-06 · 9 references not checked yet

AI snapshot

Written from the paper’s full text.

TL;DR

The paper proves that all one-bit quantum gates together with the two-bit exclusive-or gate are universal for quantum computation, and derives explicit gate constructions and bounds for generalized Toffoli and arbitrary unitary operations. It gives polynomial-size constructions for many important gates, including Θ(n²) basic operations for general ∧_{n−1}(U) gates and Θ(n³4ⁿ) two-bit gates for arbitrary n-bit unitaries.

Key findings

  • The set consisting of all one-bit gates U(2) and the two-bit XOR gate is universal: every unitary operation on n bits, U(2ⁿ), can be expressed as a composition of these gates.
  • A ∧₁(U) gate can be simulated by at most six basic gates: four one-bit gates and two XOR gates (Corollary 5.3). A ∧₂(U) gate can be simulated by at most sixteen basic gates: eight one-bit gates and eight XOR gates (Corollary 6.2).
  • For n ≥ 7, a ∧_{n−2}(σ_x) gate can be simulated by 8(n−5) three-bit Toffoli gates, or by 48n−204 basic operations (Corollary 7.4).
  • General ∧_{n−1}(U) gates can be simulated in Θ(n²) basic operations, specifically 48n² + O(n) (Corollary 7.6), with an Ω(n) lower bound for nonscalar ∧_{n−1}(U) (Lemma 7.7). Approximation within ε is possible in Θ(n log(1/ε)) basic operations (Lemma 7.8).
  • Special cases are more efficient: for W ∈ SU(2), ∧_{n−2}(W) can be simulated in Θ(n) basic operations (Corollary 7.10), and with one fixed workspace bit, general ∧_{n−2}(U) also takes Θ(n) basic operations (Corollary 7.12).
  • Any unitary operator on n bits can be simulated exactly using Θ(n³4ⁿ) two-bit gates and no work bits, via a Reck-type decomposition (Section 8).

Methods

  • Theoretical quantum gate-array formalism: defines ∧_m(U) gates, Toffoli gates, and the two-bit XOR gate, then constructs networks from basic operations consisting of one-bit gates ∧₀(U) and the XOR gate ∧₁(σ_x).
  • Proofs use matrix factorizations of 2×2 unitaries, SU(2) identities, recursive gate constructions, grey-code sequences, gate merging, phase-congruence arguments, and asymptotic recurrence/lower-bound analysis.
  • No physical experiments are reported; the paper mentions numerical study as evidence that some constructions are minimal for small cases (Section 8).

Limitations

  • The paper explicitly does not address physical realization difficulties, stating that error correction and quantum coherence are “very serious” problems and referring the reader elsewhere.
  • It states that for most examples there is no proof the constructions are the most economical, though numerical study gives compelling evidence of minimality.
  • The exact simulation of arbitrary n-bit unitaries uses Θ(n³4ⁿ) two-bit gates, which is exponential; the paper notes this is unlikely to provide a polynomial-time simulation for the special unitaries of most interest in quantum computation, and that a truly efficient design methodology remains to be found.
  • The Ω(n) lower bound leaves open the possibility of a linear-size simulation of ∧_{n−1}(U) gates, which the paper says it cannot presently show.

Model-written summary. Check it against the paper before relying on it.

Integrity signals

Registry

Crossref · 10.1103/physreva.52.3457

Cites

43 of 52 references verified0 citation errors · 0 not checkable

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Claims the paper makes

0 of 18 cited sources checked · 0 supported · 0 flagged

  • Findingreasoning
    § 5.1 Simulation of General ∧ 1 ( U ) Gates · p. 10

    For a unitary 2×2 matrix W, a ∧1(W) gate can be simulated by the stated network with A, B, C in SU(2) if and only if W is in SU(2).

    “Lemma 5.1: For a unitary 2 × 2 matrix W , a ∧ 1 ( W ) gate can be simulated by a network of the form”
    • Also stated in: § 5.1 Simulation of General ∧ 1 ( U ) Gates · p. 10 · plain
      “where A , B , and C ∈ SU (2) , if and only if W ∈ SU (2) .”
    Quote in the paperSubstantial claim
  • Findingreasoning
    § Lemma 5.4: A ∧ 1 ( W ) gate can be simulated by a network of the form · p. 14

    For any unitary 2×2 matrix U, a ∧1(U) gate can be simulated by at most six basic gates: four 1-bit gates (∧0) and two gates (∧1(V)), where V = R_z(α)·R_y(θ)·R_z(α)·σx.

    “Corollary 5.6: For any unitary 2 × 2 matrix U , a ∧ 1 ( U ) gate can be simulated by at most six basic gates: four 1-bit gates ( ∧ 0 ), and two gates ( ∧ 1 ( V ) ), where V is of the form V = R z ( α ) · R y ( θ ) · R z ( α ) · σ x .”
    Quote in the paperSubstantial claim
  • Findingown data
    § 2 Introduction · p. 7

    To implement a family of ∧m gates exactly, the time required can be reduced from Θ(m^2) to Θ(m) merely by introducing one bit for workspace.

    “Still, the presence of a workspace plays an important role in the quantum gate constructions - we find that to implement a family of ∧ m gates exactly, the time required for our implementation can be reduced from Θ( m 2 ) to Θ( m ) merely by the introduction of one bit for workspace.”
    Quote in the paperSubstantial claim
  • Findingreasoning
    § 6.1 Simulation of General ∧ 2 ( U ) Gates · p. 14

    For any unitary 2×2 matrix U, a ∧2(U) gate can be simulated by the stated network where V is unitary.

    “Lemma 6.1: For any unitary 2 × 2 matrix U , a ∧ 2 ( U ) gate can be simulated by a network of the form”
    • Also stated in: § 6.1 Simulation of General ∧ 2 ( U ) Gates · p. 14 · plain
      “where V is unitary.”
    Quote in the paperSubstantial claim
  • Findingreasoning
    § Lemma 5.4: A ∧ 1 ( W ) gate can be simulated by a network of the form · p. 12

    A ∧1(W) gate can be simulated by the stated network with A and B in SU(2) if and only if W is of the stated form with real α and θ.

    “Lemma 5.4: A ∧ 1 ( W ) gate can be simulated by a network of the form”
    • Also stated in: § Lemma 5.4: A ∧ 1 ( W ) gate can be simulated by a network of the form · p. 12 · plain
      “where A and B ∈ SU (2) if and only if W is of the form”
    • Also stated in: § Lemma 5.4: A ∧ 1 ( W ) gate can be simulated by a network of the form · p. 12 · plain
      “where α and θ are real-valued.”
    Quote in the paperSubstantial claim
  • The quote only partly states this claim. 3
  • Classified as probably not a substantial claim. 11
  • May combine two claims. 8
  • The quote only partly states this claim.

    Findingreasoning
    § Lemma 5.4: A ∧ 1 ( W ) gate can be simulated by a network of the form · p. 13

    A ∧1(V) gate can be simulated by the stated construction with A and B unitary if and only if V is of the stated form with real α and θ.

    “Lemma 5.5: A ∧ 1 ( V ) gate can be simulated by a construction of the form”
    • Also stated in: § Lemma 5.4: A ∧ 1 ( W ) gate can be simulated by a network of the form · p. 13 · plain
      “where A and B are unitary if and only if V is of the form”
    • Also stated in: § Lemma 5.4: A ∧ 1 ( W ) gate can be simulated by a network of the form · p. 12 · plain
      “where α and θ are real-valued.”
    Quote in the paperSubstantial claim
  • Probably not a substantial claim: may not pass S3 (load-bearing).

    Findingnone given
    § Lemma 5.4: A ∧ 1 ( W ) gate can be simulated by a network of the form · p. 14

    The ∧1(σz) gates are symmetric with respect to their input bits.

    “A particular feature of the ∧ 1 ( σ z ) gates is that they are symmetric with respect to their input bits.”
    Quote in the paperNot a substantial claim
  • May combine two claims.

    Findingreasoning
    § Lemma 5.4: A ∧ 1 ( W ) gate can be simulated by a network of the form · p. 13

    R_y(θ) and R_z(α) are of the form of Lemma 5.4, but R_x(θ) is not.

    “Examples of matrices of the form of Lemma 5.4 are R y ( θ ) itself, as well as R z ( α ) = R z ( α 2 ) · R y (0) · R z ( α 2 ). However, R x ( θ ) is not of this form.”
    Quote in the paperNot a substantial claim
  • The quote only partly states this claim.

    Findingnone given
    § 5.1 Simulation of General ∧ 1 ( U ) Gates · p. 11

    For any δ and S = Ph(δ), a ∧1(S) gate can be simulated by the stated network where E is unitary.

    “Lemma 5.2: For any δ and S = Ph ( δ ) , a ∧ 1 ( S ) gate can be simulated by a network of the form”
    • Also stated in: § 5.1 Simulation of General ∧ 1 ( U ) Gates · p. 11 · plain
      “where E is unitary.”
    Quote in the paperSubstantial claim
  • Probably not a substantial claim: may not pass S3 (load-bearing).

    Findingnone given
    § 5.2 Special Cases · p. 11

    The x-axis rotation matrix R_x is special unitary.

    “For example, the ' x -axis rotation matrix' (to use the language suggested by the mapping between SU(2) and SO(3), the group of rigid-body rotations[43])”
    • Also stated in: § 5.2 Special Cases · p. 12 · plain
      “is special unitary.”
    Quote in the paperNot a substantial claim
  • May combine two claims. The quote only partly states this claim.

    Findingreasoning
    § 4 Matrix Properties · p. 8

    Every unitary 2×2 matrix can be expressed as a product of a phase factor and a special unitary matrix; every special unitary 2×2 matrix can be expressed in the stated rotation form.

    “Lemma 4.1: Every unitary 2 × 2 matrix can be expressed as”
    • Also stated in: § 4 Matrix Properties · p. 8 · plain
      “where δ , α , θ , and β are real-valued. Moreover, any special unitary 2 × 2 matrix (i.e., with unity determinant) can be expressed as”
    Quote in the paperSubstantial claim
  • Probably not a substantial claim: may not pass S3 (load-bearing).

    Findingreasoning
    § Proof: By inspection. ✷ · p. 25

    The extra bit used in the simulation of a ∧^{n-2}(U) gate may be reused in the course of several simulations of ∧^m(U) gates.

    “Note that the 'extra' bit above may be reused in the course of several simulations of ∧ m ( U ) gates.”
    Quote in the paperNot a substantial claim
  • May combine two claims.

    Findingown data
    § 6.2 Three-bit gates congruent to ∧ 2 ( U ) · p. 16

    A more efficient simulation of a gate congruent to ∧2(σx) modulo phase shifts is given by the stated network with A = R_y(π/4); the networks differ at most in phases of amplitudes, all ±1, with the phase of |101> reversed.

    “The following is a more efficient simulation of a gate congruent to ∧ 2 ( σ x ) modulo phase shifts:”
    • Also stated in: § 6.2 Three-bit gates congruent to ∧ 2 ( U ) · p. 16 · plain
      “where A = R y ( π 4 ). In the above, the ' ∼ =' indicates that the networks are not identical, but differ at most in the phases of their amplitudes, which are all ± 1 (the phase of the | 101 〉 state is reversed in this case).”
    Quote in the paperSubstantial claim
  • May combine two claims.

    Findingreasoning
    § 8 Efficient general gate constructions · p. 26

    When any two-bit gate is taken as the basic operation, 5 operations suffice to produce the Toffoli gate, 3 produce the Toffoli gate modulo phases, and 13 can be used to produce the 4-bit Toffoli gate.

    “When the arbitrary two-bit gate is taken as the basic operation, then as we have seen, 5 operations suffice to produce the Toffoli gate (recall Lemma 6.1), 3 produce the Toffoli gate modulo phases (we permit a merging of the operations in the construction of Sec. 6.2), and 13 can be used to produce the 4-bit Toffoli gate (see Lemma 7.1).”
    Quote in the paperSubstantial claim
  • May combine two claims.

    Findingreasoning
    § 7.1 Linear Simulation of ∧ n -2 ( σ x ) Gates on n -Bit Networks · p. 20

    On an n-bit network with n ≥ 7, a ∧^{n-2}(σ_x) gate can be simulated by 8(n-5) ∧^2(σ_x) gates (3-bit Toffoli gates), as well as by 48n-204 basic operations.

    “Corollary 7.4: On an n -bit network (where n ≥ 7 ), a ∧ n -2 ( σ x ) gate can be simulated by 8( n -5) ∧ 2 ( σ x ) gates (3-bit Toffoli gates), as well as by 48 n -204 basic operations.”
    Quote in the paperSubstantial claim
  • May combine two claims.

    Findingcitation
    § 7.1 Linear Simulation of ∧ n -2 ( σ x ) Gates on n -Bit Networks · p. 19

    In this construction and the ones following, the gate operation is performed correctly independent of the initial state of the bits not involved in the gate, and those bits are reset to their initial values after the operations.

    “Note that in this construction and in the ones following, although many of the bits not involved in the gate are operated upon, the gate operation is performed correctly independent of the initial state of the bits (i.e., they do not have to be 'cleared' to 0 first), and they are reset to their initial values after the operations of the gate (as in the computations which occur in [41] and [40]).”
    Quote in the paperSubstantial claim0 of 2 sources checked
    • cites [41] [41] Michael Ben-Or and Richard Cleve, 'Computing algebraic formulas using a constant number of registers', SIAM J. Comput. 21 , 54 (1992). -

      Not checked in the free run.

    • cites [40] [40] Richard Cleve, 'Reversible Programs and Simple Product Ciphers' in Methodologies for Designing Block Ciphers and Cryptographic Protocols , PhD Thesis, University of Toronto, pp. 2-56 (1989). -

      Not checked in the free run.

  • May combine two claims.

    Findingreasoning
    § 6.1 Simulation of General ∧ 2 ( U ) Gates · p. 15

    Because ∧2(σx) is its own inverse, either the simulation of Lemma 6.1 or the time-reversed simulation may be used.

    “Later we will use the fact that because ∧ 2 ( σ x ) is its own inverse, either the simulation of Lemma 6.1 or the time-reversed simulation (in which the order of the gates is reversed, and each unitary operator is replaced by its Hermitian conjugate) may be used.”
    Quote in the paperNot a substantial claim
  • Probably not a substantial claim: may not pass S3 (load-bearing).

    Premisecitation
    § 1 Background · p. 4

    A simple generalization of the Toffoli gate (the three-bit gate ∧2(Rx)) suffices as a universal gate for quantum computing.

    “The formalism we use for quantum computation, which we call a quantum 'gate array' was introduced by Deutsch [24], who showed that a simple generalization of the Toffoli gate (the three-bit gate ∧ 2 ( R x ), in the language introduced later in this paper) suffices as a universal gate for quantum computing.”
    Quote in the paperNot a substantial claim0 of 1 sources checked
    • cites [24] [24] D. Deutsch, 'Quantum computational networks', Proc. Roy. Soc. Lond. A 425 , 73 (1989). -

      Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  • Classified as probably not a substantial claim.

    Premisecitation
    § 1 Background · p. 2

    Any computation can be performed reversibly both logically and thermodynamically, in principle by a physical apparatus dissipating arbitrarily little energy.

    “It is possible to perform any computation in a way that is reversible both logically -i.e., the computation is a sequence of bijective transformations-and thermodynamically -the computation could in principle be performed by a physical apparatus dissipating arbitrarily little energy [2].”
    Quote in the paperSubstantial claim0 of 1 sources checked
    • cites [2] [2] R. Landauer, 'Irreversibility and heat generation in the computing process', IBM J. Res. Dev. 5 , 183 (1961); C. H. Bennett, 'Logical reversibility of computation', IBM Journal of Research and Development, 17 , 525 (1973); Yves Lecerf, 'Machines de Turing reversibles. Recursive insolubilite en nεN de l'equation u = θ n ou θ est un 'isomorphism de codes'. Comptes Rendus 257 , 2597-2600 (1963); C. H. Bennett, 'Time/space trade-offs for reversible computation', SIAM J. Comput. 18 , 766 (1989). For a review, see C. H. Bennett and R. Landauer, 'Physical limits of computation', Scientific Americ source

      Not checked in the free run.

  • Probably not a substantial claim: may not pass S3 (load-bearing).

    Premisecitation
    § 1 Background · p. 4

    Acyclic quantum gate arrays can simulate quantum Turing machines.

    “Fortunately, Yao has shown [27] that acyclic quantum gate arrays can simulate quantum Turing machines.”
    Quote in the paperNot a substantial claim0 of 1 sources checked
    • cites [27] [27] A. C.-C. Yao, 'Quantum Circuit Complexity', Proceedings of the 34th Annual Symposium on the Foundations of Computer Science (IEEE Computer Society Press, Los Alamitos, CA, 1993), p. 352. -

      Not checked in the free run.

  • Probably not a substantial claim: may not pass S3 (load-bearing). May combine two claims.

    Premisecitation
    § 5.2 Special Cases · p. 12

    ∧2(iR_x) is the Deutsch gate, which was shown to be universal for quantum logic.

    “( R x is of special interest because ∧ 2 ( iR x ) is the 'Deutsch gate'[24], which was shown to be universal for quantum logic.)”
    Quote in the paperNot a substantial claim0 of 1 sources checked
    • cites [24] [24] D. Deutsch, 'Quantum computational networks', Proc. Roy. Soc. Lond. A 425 , 73 (1989). -

      Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  • Probably not a substantial claim: may not pass S3 (load-bearing).

    Premisecitation
    § 1 Background · p. 5

    There is a scheme for obtaining the Toffoli gate with a sequence of exactly five two-bit gates.

    “Sleator and Weinfurter[9], who exhibited a scheme for obtaining the Toffoli gate with a sequence of exactly five two-bit gates.”
    Quote in the paperNot a substantial claim0 of 1 sources checked
    • cites [9] [9] Tycho Sleator and Harald Weinfurter, 'Realizable universal quantum logic gates', preprint (1994). -

      Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  • Classified as probably not a substantial claim.

    Premisecitation
    § 2 Introduction · p. 7

    Only a tiny fraction of Boolean functions-those linear with respect to modulo 2 arithmetic-can be generated with ∧1(0 1 1 0) and ∧0(0 1 1 0) gates.

    “In fact, it is well known that only a tiny fraction of Boolean functions (those which are linear with respect to modulo 2 arithmetic) can be generated with these gates[39].”
    Quote in the paperSubstantial claim0 of 1 sources checked
    • cites [39] [39] D. Coppersmith and E. Grossman, 'Generators for Certain Alternating Groups with Applications to Cryptography', SIAM J. Applied Math. 29 , No. 4, pp. 624-627 (1975). -

      Not checked in the free run.

  • Classified as probably not a substantial claim.

    Premisecitation
    § 1 Background · p. 2

    There exists a 3-bit universal gate for reversible computation that, applied in succession to different triplets of bits in a gate array, can simulate any arbitrary reversible computation.

    “Fredkin and Toffoli[3] showed that there exists a 3-bit 'universal gate' for reversible computation, that is, a gate which, when applied in succession to different triplets of bits in a gate array, could be used to simulate any arbitrary reversible computation.”
    Quote in the paperSubstantial claim0 of 1 sources checked
    • cites [3] [3] E. Fredkin and T. Toffoli, 'Conservative Logic', Internat. J. Theoret. Phys. 21 , 219 (1982). -

      Couldn’t be matched to a paper in Crossref, so it can’t be checked.

  • Classified as probably not a substantial claim.

    Premisecitation
    § 1 Background · p. 2

    Unitary evolution on a normalized state vector is the correct physical description of an isolated system evolving in time according to quantum mechanics.

    “This unitary evolution on a normalized state vector is known to be the correct physical description of an isolated system evolving in time according to the laws of quantum mechanics[1].”
    Quote in the paperSubstantial claim0 of 1 sources checked
    • cites [1] [1] P. A. M. Dirac, The Principles of Quantum Mechanics , (Oxford, 1958), Chap. 5; for a modern treatment, see A. Peres, Quantum Theory: Concepts and Methods , (Kluwer, 1993), Chap. 8.6. - source

      Not checked in the free run.

20 of 20

Claims other papers make about this one

Each is checked against this paper’s own text: does it say what the citing paper says it does?

  • For general k, the time-efficient design as in Fig. 5a requires k-2 zeroed work qubits within depth 2k-3, whereas the space-efficient design as in Fig. 5b uses only one arbitrary qubit within depth 8k-24 (for k ≥ 5).

    “In fact for general k, time-efficient design as in Fig. 5a requires k-2 zeroed work qubits within depth 2k-3, whereas space-efficient design as in Fig. 5b uses only one arbitrary qubit within depth 8k-24 (for k ≥ 5) [32].”

    From Time–space complexity of quantum search algorithms in symmetric cryptanalysis: applying to AES and SHA-2 (2018) · cites this paper as [32]

    Section 7.1 (pp. 18–20) supports a construction using one extra bit whose initial state need not be zero. Corollary 7.4 gives 8(n−5) Toffoli gates, which equals 8k−24 when n=k+2, but it counts gates rather than establishing that depth. Our copy does not establish the claimed k−2 zeroed work qubits or depth 2k−3 for the other design. (LLM, conf=0.86)

    Experimental — accuracy not yet measured
  • Any two-qubit gate can be obtained from single-qubit rotational gates and at least one entangling gate by using circuit decompositions.

    “Any two-qubit gate can be obtained from this minimal set by using circuit decompositions (Barenco et al. , 1995; Blaauboer and De Visser, 2008; de Guise et al. , 2018; Peterson et al. , 2020; Watts et al. , 2013).”

    From Noisy intermediate-scale quantum algorithms (2022) · cites this paper as Barenco et al., 1995

  • The Toffoli gate times reported here are faster than previous literature results for the maximum speed of Toffoli gates.

    “We should point out here that the results presented here give faster gates than any results for the maximum speed of Toffoli gates in the literature [2,3].”

    From Speed limits for quantum gates in multiqubit systems (2012) · cites this paper as [3]

  • For triangle geometry, the Toffoli gate time factor 1.9 is about 15% better than the 2.2 factor from Ref. [3].

    “In particular, one can compare the factor 1.9 in Table II with the corresponding factor of 2.2 in Ref. [3]: an improvement of about 15%.”

    From Speed limits for quantum gates in multiqubit systems (2012) · cites this paper as [3]

  • An optimal-control calculation found a Toffoli gate time of about 2.2 times the CNOT gate time for qubits in a triangle geometry.

    “An optimal-control-theory-related calculation based on certain forms of pulses has found a gate time of about 2.2 times the CNOT gate time for qubits coupled in a triangle geometry [3].”

    From Speed limits for quantum gates in multiqubit systems (2012) · cites this paper as [3]

Self-check

Percentages, sums and reported differences re-computed from the paper’s own numbers.

Each contradiction between two passages listed here was confirmed by an independent check.

  • Corollary 7.4 miscounts the remaining Toffoli gates

    Minor

    The stated total is 8(n−5) Toffoli gates. If 4 are simulated exactly, the number of other gates is 8n−44, not 8n−36.

1 of 1

Cites

Flagged first, then by citations

Research works printed but not linked: 2

  1. A. C. C. Yao, Proceedings of the 34th Annual Symposium on the Foundations of Computer Science
  2. D. P. DiVincenzo, Proceedings of the Workshop on Physics and Computation, PhysComp '94

Cited by

Sorted by citations

Authors
Barenco, A., Bennett, C. H., Cleve, R., DiVincenzo, D. P., Margolus, N., Shor, P., Sleator, T., Smolin, J. A., & Weinfurter, H.
Affiliations
AT&T (United States) (US)
Venue
Physical Review A
Published
1995-11-01
Volume
52
Issue
5
Pages
3457-3467
ISSN
  • 0556-2791 (ISSN-L)
  • 1050-2947
  • 1094-1622
OpenAlex
W2102008187
Cited by
4,311
References
52
Citations by year
2026: 201 · 2025: 271 · 2024: 253 · 2023: 271 · 2022: 258 · 2021: 218 · 2020: 200 · 2019: 179 · 2018: 152 · 2017: 125 · 2016: 125 · 2015: 130 · 2014: 119 · 2013: 124 · 2012: 136
FWCI
63.39
Type
journal article
Language
en
Open access
Locations
  • Physical Review A (publishedVersion)
  • PubMed (publishedVersion)
  • arXiv (Cornell University) (submittedVersion)
  • CERN Document Server (European Organization for Nuclear Research) (submittedVersion)
  • arXiv (Cornell University)
Topics
  • Physical Sciences › Computer Science › Artificial Intelligence › Quantum Computing Algorithms and Architecture
  • Physical Sciences › Computer Science › Artificial Intelligence › Quantum Information and Cryptography
  • Physical Sciences › Computer Science › Computational Theory and Mathematics › Quantum-Dot Cellular Automata
Keywords
quantum gates, XOR gate, gate decomposition, circuit complexity, lower bounds, upper bounds, quantum computing

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