Cited by 212Analog and Mixed-Signal Circuit DesignNeuroscience and Neural EngineeringCCD and CMOS Imaging Sensors

A Neural Stimulator Frontend With High-Voltage Compliance and Programmable Pulse Shape for Epiretinal Implants

Noorsal, Emilia, Sooksood, Kriangkrai, Xu, Hongcheng, Hornig, Ralf, Becker, Joachim, Ortmanns, Maurits·2012·IEEE Journal of Solid-State Circuits

Abstract

This paper presents an integrated neural stimulator with highly efficient and flexible frontend which is intended for an epiretinal implant with 1024 electrodes. It features programmable stimulation pulse shapes, a high-voltage (HV) output driver with compliance monitor for supply voltage adaptation, active and passive charge balancers, and electrode impedance measurement. Area and power efficiency is achieved by global timing assignment and local amplitude control over a bus at the local stimulation units. Major power savings in the distributed digital control units are realized by implementing global and local clock gating. Two stimulator frontends have been fabricated in a 0.35 μm HVCMOS process. Each frontend features four demultiplexed outputs and consumes 0.2 mm2core area. A maximum voltage compliance of 20 V is achieved and up to 1 mA of output current can be adjusted with up to 50 dB dynamic range. In vitro experimental results performed on a platinum black electrode in 0.9% saline solution are given.

Integrity signals

Registry

Crossref · 10.1109/jssc.2011.2164667

Cites

36 of 36 references verified0 citation errors · 0 not checkable

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  • Real-time monitoring of the voltage compliance enables operation with the minimum supply necessary for stimulation, which improves the power efficiency of the HV stimulus pulse driver circuit.

    “Real-time monitoring of the voltage compliance enables operation with the minimum supply necessary for stimulation, which improves the power efficiency of the HV stimulus pulse driver circuit [44], [129].”
  • The VCR topology can maintain a high output impedance with little voltage overhead by introducing regulated cascode current mirrors.

    “Alternatively, the VCR topology can maintain a high output impedance with little voltage overhead by introducing regulated cascode current mirrors, as shown in Fig. 5(b). These structures avoid reliance on linearity compensation circuits [129].”

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Authors
Noorsal, E., Sooksood, K., Xu, H., Hornig, R., Becker, J., & Ortmanns, M.
Affiliations
  • Universität Ulm (DE)
  • Bundesnetzagentur (DE)
Venue
IEEE Journal of Solid-State Circuits
Published
2012-01
Volume
47
Issue
1
Pages
244-256
ISSN
  • 0018-9200 (ISSN-L)
  • 1558-173X
OpenAlex
W1971046436
Cited by
212
References
36
Citations by year
2026: 4 · 2025: 12 · 2024: 12 · 2023: 13 · 2022: 12 · 2021: 17 · 2020: 11 · 2019: 14 · 2018: 14 · 2017: 13 · 2016: 23 · 2015: 18 · 2014: 18 · 2013: 21 · 2012: 10
FWCI
9.28
Type
journal article
Language
en
Open access
closed
Locations
IEEE Journal of Solid-State Circuits (publishedVersion)
Topics
  • Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
  • Life Sciences › Neuroscience › Cellular and Molecular Neuroscience › Neuroscience and Neural Engineering
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › CCD and CMOS Imaging Sensors
Keywords
epiretinal implants, voltage compliance, clock gating, power efficiency, retinal prosthesis, platinum black electrodes

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