Cited by 338Analog and Mixed-Signal Circuit DesignRadio Frequency Integrated Circuit DesignNeuroscience and Neural Engineering

A 0.013 ${\hbox {mm}}^{2}$, 5 $\mu\hbox{W}$, DC-Coupled Neural Signal Acquisition IC With 0.5 V Supply

Muller, Rikky, Gambini, Simone, Rabaey, Jan M.·2012·IEEE Journal of Solid-State Circuits

Abstract

We present an area-efficient neural signal-acquisition system that uses a digitally intensive architecture to reduce system area and enable operation from a 0.5 V supply. The architecture replaces ac coupling capacitors and analog filters with a dual mixed-signal servo loop, which allows simultaneous digitization of the action and local field potentials. A noise-efficient DAC topology and an compact, boxcar sampling ADC are used to cancel input offset and prevent noise folding while enabling “per-pixel” digitization, alleviating system-level complexity. Implemented in a 65 nm CMOS process, the prototype occupies 0.013 mm2while consuming 5 μW and achieving 4.9 μVrms of input-referred noise in a 10 kHz bandwidth.

Integrity signals

Registry

Crossref · 10.1109/jssc.2011.2163552

Cites

26 of 26 references verified0 citation errors · 0 not checkable

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Claims other papers make about this one

Each is checked against this paper’s own text: does it say what the citing paper says it does?

  • Modern circuit designs and IC fabrication technologies have produced innovative designs that allow designers to relax the size-functionality compromises.

    “However, modern circuit designs [77, 92] and IC fabrication technologies [18, 86] have resulted in innovative designs, enabling designers to relax such compromises.”
  • Neural amplifier ICs have been created that capture both action potentials and local field potentials, with separate filtering, amplification and output for each signal type.

    “CNS amplifiers have also been developed that can acquire both types of signals, separately filtering, amplifying and outputting each signal type [46, 86, 100].”
  • Muller et al. introduced the power efficiency factor, which accounts for both operating current and supply voltage and therefore provides a better comparison of amplifier performance.

    “Recently, Muller et al. [86] introduced the power efficiency factor (PEF), which takes into account both the operating current and the supply voltage and therefore provides a better comparison of the amplifier’s performance.”

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Authors
Muller, R., Gambini, S., & Rabaey, J. M.
Affiliations
University of California, Berkeley (US)
Venue
IEEE Journal of Solid-State Circuits
Published
2012-01
Volume
47
Issue
1
Pages
232-243
ISSN
  • 0018-9200 (ISSN-L)
  • 1558-173X
OpenAlex
W2003444784
Cited by
338
References
27
Citations by year
2026: 11 · 2025: 23 · 2024: 18 · 2023: 21 · 2022: 22 · 2021: 26 · 2020: 26 · 2019: 25 · 2018: 34 · 2017: 28 · 2016: 25 · 2015: 26 · 2014: 26 · 2013: 20 · 2012: 7
FWCI
10.04
Type
journal article
Language
en
Open access
closed
Locations
IEEE Journal of Solid-State Circuits (publishedVersion)
Topics
  • Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
  • Life Sciences › Neuroscience › Cellular and Molecular Neuroscience › Neuroscience and Neural Engineering
Keywords
neural signal acquisition, low-power integrated circuits, local field potentials, digital-to-analog converter, noise folding, low-voltage operation, 65 nm CMOS, area-efficient circuit design

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